From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PATCH 1/5] tcg: Decode the operand to INDEX_op_mb in dumps
Date: Tue, 16 Mar 2021 16:07:31 -0600 [thread overview]
Message-ID: <20210316220735.2048137-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210316220735.2048137-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg.c | 79 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 2991112829..23a94d771c 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -2415,6 +2415,85 @@ static void tcg_dump_ops(TCGContext *s, bool have_prefs)
arg_label(op->args[k])->id);
i++, k++;
break;
+ case INDEX_op_mb:
+ {
+ TCGBar membar = op->args[k];
+ const char *b_op, *m_op;
+
+ switch (membar & TCG_BAR_SC) {
+ case 0:
+ b_op = "none";
+ break;
+ case TCG_BAR_LDAQ:
+ b_op = "acq";
+ break;
+ case TCG_BAR_STRL:
+ b_op = "rel";
+ break;
+ case TCG_BAR_SC:
+ b_op = "seq";
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ switch (membar & TCG_MO_ALL) {
+ case 0:
+ m_op = "none";
+ break;
+ case TCG_MO_LD_LD:
+ m_op = "rr";
+ break;
+ case TCG_MO_LD_ST:
+ m_op = "rw";
+ break;
+ case TCG_MO_ST_LD:
+ m_op = "wr";
+ break;
+ case TCG_MO_ST_ST:
+ m_op = "ww";
+ break;
+ case TCG_MO_LD_LD | TCG_MO_LD_ST:
+ m_op = "rr+rw";
+ break;
+ case TCG_MO_LD_LD | TCG_MO_ST_LD:
+ m_op = "rr+wr";
+ break;
+ case TCG_MO_LD_LD | TCG_MO_ST_ST:
+ m_op = "rr+ww";
+ break;
+ case TCG_MO_LD_ST | TCG_MO_ST_LD:
+ m_op = "rw+wr";
+ break;
+ case TCG_MO_LD_ST | TCG_MO_ST_ST:
+ m_op = "rw+ww";
+ break;
+ case TCG_MO_ST_LD | TCG_MO_ST_ST:
+ m_op = "wr+ww";
+ break;
+ case TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_LD:
+ m_op = "rr+rw+wr";
+ break;
+ case TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST:
+ m_op = "rr+rw+ww";
+ break;
+ case TCG_MO_LD_LD | TCG_MO_ST_LD | TCG_MO_ST_ST:
+ m_op = "rr+wr+ww";
+ break;
+ case TCG_MO_LD_ST | TCG_MO_ST_LD | TCG_MO_ST_ST:
+ m_op = "rw+wr+ww";
+ break;
+ case TCG_MO_ALL:
+ m_op = "all";
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ col += qemu_log("%s%s:%s", (k ? "," : ""), b_op, m_op);
+ i++, k++;
+ }
+ break;
default:
break;
}
--
2.25.1
next prev parent reply other threads:[~2021-03-16 22:08 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-16 22:07 [PATCH 0/5] tcg: Issue memory barriers for guest memory model Richard Henderson
2021-03-16 22:07 ` Richard Henderson [this message]
2021-03-17 13:32 ` [PATCH 1/5] tcg: Decode the operand to INDEX_op_mb in dumps Philippe Mathieu-Daudé
2021-03-16 22:07 ` [PATCH 2/5] tcg: Do not elide memory barriers for CF_PARALLEL Richard Henderson
2021-03-16 22:07 ` [PATCH 3/5] tcg: Elide memory barriers implied by the host memory model Richard Henderson
2021-03-16 22:07 ` [PATCH 4/5] tcg: Create tcg_req_mo Richard Henderson
2021-03-16 22:07 ` [PATCH 5/5] tcg: Add host memory barriers to cpu_ldst.h interfaces Richard Henderson
2021-03-16 22:30 ` [PATCH 0/5] tcg: Issue memory barriers for guest memory model no-reply
2021-06-26 6:06 ` Richard Henderson
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