From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PATCH 4/5] tcg: Create tcg_req_mo
Date: Tue, 16 Mar 2021 16:07:34 -0600 [thread overview]
Message-ID: <20210316220735.2048137-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210316220735.2048137-1-richard.henderson@linaro.org>
Split out the logic to emit a host memory barrier in response to
a guest memory operation. Do not provide a true default for
TCG_GUEST_DEFAULT_MO because the defined() check will still be
useful for determining if a guest has been updated for MTTCG.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 20 ++++++++++++++++++++
accel/tcg/tcg-all.c | 6 +-----
tcg/tcg-op.c | 8 +-------
3 files changed, 22 insertions(+), 12 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 0f0695e90d..395b3b6964 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -1245,6 +1245,26 @@ static inline unsigned get_mmuidx(TCGMemOpIdx oi)
return oi & 15;
}
+/**
+ * tcg_req_mo:
+ * @type: TCGBar
+ *
+ * Filter @type to the barrier that is required for the guest
+ * memory ordering vs the host memory ordering. A non-zero
+ * result indicates that some barrier is required.
+ *
+ * If TCG_GUEST_DEFAULT_MO is not defined, assume that the
+ * guest requires strict alignment.
+ *
+ * This is a macro so that it's constant even without optimization.
+ */
+#ifdef TCG_GUEST_DEFAULT_MO
+# define tcg_req_mo(type) \
+ ((type) & TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO)
+#else
+# define tcg_req_mo(type) ((type) & ~TCG_TARGET_DEFAULT_MO)
+#endif
+
/**
* tcg_qemu_tb_exec:
* @env: pointer to CPUArchState for the CPU
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index e378c2db73..6ae51e3476 100644
--- a/accel/tcg/tcg-all.c
+++ b/accel/tcg/tcg-all.c
@@ -69,11 +69,7 @@ DECLARE_INSTANCE_CHECKER(TCGState, TCG_STATE,
static bool check_tcg_memory_orders_compatible(void)
{
-#if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO)
- return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0;
-#else
- return false;
-#endif
+ return tcg_req_mo(TCG_MO_ALL) == 0;
}
static bool default_mttcg_enabled(void)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index c8501508c2..12fc8a1b17 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -2796,13 +2796,7 @@ static void gen_ldst_i64(TCGOpcode opc, TCGv_i64 val, TCGv addr,
static void tcg_gen_req_mo(TCGBar type)
{
-#ifdef TCG_GUEST_DEFAULT_MO
- type &= TCG_GUEST_DEFAULT_MO;
-#endif
- type &= ~TCG_TARGET_DEFAULT_MO;
- if (type) {
- tcg_gen_mb(type | TCG_BAR_SC);
- }
+ tcg_gen_mb(tcg_req_mo(type) | TCG_BAR_SC);
}
static inline TCGv plugin_prep_mem_callbacks(TCGv vaddr)
--
2.25.1
next prev parent reply other threads:[~2021-03-16 22:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-16 22:07 [PATCH 0/5] tcg: Issue memory barriers for guest memory model Richard Henderson
2021-03-16 22:07 ` [PATCH 1/5] tcg: Decode the operand to INDEX_op_mb in dumps Richard Henderson
2021-03-17 13:32 ` Philippe Mathieu-Daudé
2021-03-16 22:07 ` [PATCH 2/5] tcg: Do not elide memory barriers for CF_PARALLEL Richard Henderson
2021-03-16 22:07 ` [PATCH 3/5] tcg: Elide memory barriers implied by the host memory model Richard Henderson
2021-03-16 22:07 ` Richard Henderson [this message]
2021-03-16 22:07 ` [PATCH 5/5] tcg: Add host memory barriers to cpu_ldst.h interfaces Richard Henderson
2021-03-16 22:30 ` [PATCH 0/5] tcg: Issue memory barriers for guest memory model no-reply
2021-06-26 6:06 ` Richard Henderson
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