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[187.189.51.144]) by smtp.gmail.com with ESMTPSA id i11sm8271154otp.76.2021.03.17.08.34.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Mar 2021 08:34:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 00/38] tcg patch queue for 6.0 Date: Wed, 17 Mar 2021 09:34:06 -0600 Message-Id: <20210317153444.310566-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::22d; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The following changes since commit 5d1428d6c43942cfb40a909e4c30a5cbb81bda8f: Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210315' into staging (2021-03-17 09:07:28 +0000) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210317 for you to fetch changes up to 5e8892db93f3fb6a7221f2d47f3c952a7e489737: tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op (2021-03-17 09:04:45 -0600) ---------------------------------------------------------------- TCI argument extraction helpers and disassembler TCG build fix for gcc 11 ---------------------------------------------------------------- Miroslav Rezanina (1): tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op Richard Henderson (37): tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64 tcg/tci: Rename tci_read_r to tci_read_rval tcg/tci: Split out tci_args_rrs tcg/tci: Split out tci_args_rr tcg/tci: Split out tci_args_rrr tcg/tci: Split out tci_args_rrrc tcg/tci: Split out tci_args_l tcg/tci: Split out tci_args_rrrrrc tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl tcg/tci: Split out tci_args_ri and tci_args_rI tcg/tci: Reuse tci_args_l for calls. tcg/tci: Reuse tci_args_l for exit_tb tcg/tci: Reuse tci_args_l for goto_tb tcg/tci: Split out tci_args_rrrrrr tcg/tci: Split out tci_args_rrrr tcg/tci: Clean up deposit operations tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bits tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm} tcg/tci: Hoist op_size checking into tci_args_* tcg/tci: Remove tci_disas tcg/tci: Implement the disassembler properly tcg/tci: Push opcode emit into each case tcg/tci: Split out tcg_out_op_rrs tcg/tci: Split out tcg_out_op_l tcg/tci: Split out tcg_out_op_p tcg/tci: Split out tcg_out_op_rr tcg/tci: Split out tcg_out_op_rrr tcg/tci: Split out tcg_out_op_rrrc tcg/tci: Split out tcg_out_op_rrrrrc tcg/tci: Split out tcg_out_op_rrrbb tcg/tci: Split out tcg_out_op_rrcl tcg/tci: Split out tcg_out_op_rrrrrr tcg/tci: Split out tcg_out_op_rrrr tcg/tci: Split out tcg_out_op_rrrrcl tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm} tcg/tci: Split out tcg_out_op_v tcg/tci: Split out tcg_out_op_r[iI] meson.build | 2 +- include/tcg/tcg-opc.h | 2 - tcg/tci/tcg-target-con-set.h | 1 - tcg/tci/tcg-target.h | 13 +- disas/tci.c | 61 --- tcg/tcg.c | 19 +- tcg/tci.c | 1109 ++++++++++++++++++++++++++++-------------- tcg/aarch64/tcg-target.c.inc | 3 +- tcg/i386/tcg-target.c.inc | 6 +- tcg/mips/tcg-target.c.inc | 3 +- tcg/ppc/tcg-target.c.inc | 8 +- tcg/riscv/tcg-target.c.inc | 3 +- tcg/s390/tcg-target.c.inc | 3 +- tcg/tci/tcg-target.c.inc | 486 ++++++++++++------ 14 files changed, 1107 insertions(+), 612 deletions(-) delete mode 100644 disas/tci.c