From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Laurent Vivier <laurent@vivier.eu>
Subject: [PATCH for-6.0] target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
Date: Fri, 19 Mar 2021 18:06:06 -0600 [thread overview]
Message-ID: <20210320000606.1788699-1-richard.henderson@linaro.org> (raw)
Pretend the fault always happens at page table level 3.
Failure to set this leaves level = 0, which is impossible for
ARMFault_Permission, and produces an invalid syndrome, which
reaches g_assert_not_reached in cpu_loop.
Fixes: 8db94ab4e5db ("linux-user/aarch64: Pass syndrome to EXC_*_ABORT")
Reported-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tlb_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index 9609333cbd..3107f9823e 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -163,6 +163,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
} else {
fi.type = ARMFault_Translation;
}
+ fi.level = 3;
/* now we have a real cpu fault */
cpu_restore_state(cs, retaddr, true);
--
2.25.1
next reply other threads:[~2021-03-20 0:08 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-20 0:06 Richard Henderson [this message]
2021-03-22 14:10 ` [PATCH for-6.0] target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill Peter Maydell
2021-03-23 14:07 ` Peter Maydell
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