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From: Claudio Fontana <cfontana@suse.de>
To: "Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Roman Bolshakov <r.bolshakov@yadro.com>,
	Claudio Fontana <cfontana@suse.de>,
	Eduardo Habkost <ehabkost@redhat.com>,
	qemu-devel@nongnu.org
Subject: [RFC v10 12/49] target/arm: only perform TCG cpu and machine inits if TCG enabled
Date: Mon, 22 Mar 2021 15:01:29 +0100	[thread overview]
Message-ID: <20210322140206.9513-13-cfontana@suse.de> (raw)
In-Reply-To: <20210322140206.9513-1-cfontana@suse.de>

of note, cpreg lists were previously initialized by TCG first,
and then thrown away and replaced with the data coming from KVM.

Now we just initialize once, either for TCG or for KVM.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
 target/arm/cpu.c     | 32 ++++++++++++++++++--------------
 target/arm/kvm.c     | 18 +++++++++---------
 target/arm/machine.c | 20 +++++++++++++-------
 3 files changed, 40 insertions(+), 30 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 048c904933..e47b09fe18 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -436,9 +436,11 @@ static void arm_cpu_reset(DeviceState *dev)
     }
 #endif
 
-    hw_breakpoint_update_all(cpu);
-    hw_watchpoint_update_all(cpu);
-    arm_rebuild_hflags(env);
+    if (tcg_enabled()) {
+        hw_breakpoint_update_all(cpu);
+        hw_watchpoint_update_all(cpu);
+        arm_rebuild_hflags(env);
+    }
 }
 
 static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx,
@@ -1319,6 +1321,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
         }
     }
 
+#ifdef CONFIG_TCG
     {
         uint64_t scale;
 
@@ -1344,7 +1347,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
         cpu->gt_timer[GTIMER_HYPVIRT] = timer_new(QEMU_CLOCK_VIRTUAL, scale,
                                                   arm_gt_hvtimer_cb, cpu);
     }
-#endif
+#endif /* CONFIG_TCG */
+#endif /* !CONFIG_USER_ONLY */
 
     cpu_exec_realizefn(cs, &local_err);
     if (local_err != NULL) {
@@ -1645,17 +1649,16 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
         unset_feature(env, ARM_FEATURE_PMU);
     }
     if (arm_feature(env, ARM_FEATURE_PMU)) {
-        pmu_init(cpu);
-
-        if (!kvm_enabled()) {
+        if (tcg_enabled()) {
+            pmu_init(cpu);
             arm_register_pre_el_change_hook(cpu, &pmu_pre_el_change, 0);
             arm_register_el_change_hook(cpu, &pmu_post_el_change, 0);
-        }
 
 #ifndef CONFIG_USER_ONLY
-        cpu->pmu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, arm_pmu_timer_cb,
-                cpu);
+            cpu->pmu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, arm_pmu_timer_cb,
+                                          cpu);
 #endif
+        }
     } else {
         cpu->isar.id_aa64dfr0 =
             FIELD_DP64(cpu->isar.id_aa64dfr0, ID_AA64DFR0, PMUVER, 0);
@@ -1738,10 +1741,11 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
         set_feature(env, ARM_FEATURE_VBAR);
     }
 
-    register_cp_regs_for_features(cpu);
-    arm_cpu_register_gdb_regs_for_features(cpu);
-
-    init_cpreg_list(cpu);
+    if (tcg_enabled()) {
+        register_cp_regs_for_features(cpu);
+        arm_cpu_register_gdb_regs_for_features(cpu);
+        init_cpreg_list(cpu);
+    }
 
 #ifndef CONFIG_USER_ONLY
     MachineState *ms = MACHINE(qdev_get_machine());
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index d8381ba224..1b093cc52f 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -431,9 +431,11 @@ static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx)
     return &cpu->cpreg_values[res - cpu->cpreg_indexes];
 }
 
-/* Initialize the ARMCPU cpreg list according to the kernel's
- * definition of what CPU registers it knows about (and throw away
- * the previous TCG-created cpreg list).
+/*
+ * Initialize the ARMCPU cpreg list according to the kernel's
+ * definition of what CPU registers it knows about.
+ *
+ * The parallel for TCG is init_cpreg_list() in tcg/
  */
 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
 {
@@ -475,12 +477,10 @@ int kvm_arm_init_cpreg_list(ARMCPU *cpu)
         arraylen++;
     }
 
-    cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
-    cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
-    cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
-                                         arraylen);
-    cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
-                                        arraylen);
+    cpu->cpreg_indexes = g_new(uint64_t, arraylen);
+    cpu->cpreg_values = g_new(uint64_t, arraylen);
+    cpu->cpreg_vmstate_indexes = g_new(uint64_t, arraylen);
+    cpu->cpreg_vmstate_values = g_new(uint64_t, arraylen);
     cpu->cpreg_array_len = arraylen;
     cpu->cpreg_vmstate_array_len = arraylen;
 
diff --git a/target/arm/machine.c b/target/arm/machine.c
index e568662cca..2982e8d7f4 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -2,6 +2,7 @@
 #include "cpu.h"
 #include "qemu/error-report.h"
 #include "sysemu/kvm.h"
+#include "sysemu/tcg.h"
 #include "kvm_arm.h"
 #include "internals.h"
 #include "migration/cpu.h"
@@ -635,7 +636,7 @@ static int cpu_pre_save(void *opaque)
 {
     ARMCPU *cpu = opaque;
 
-    if (!kvm_enabled()) {
+    if (tcg_enabled()) {
         pmu_op_start(&cpu->env);
     }
 
@@ -670,7 +671,7 @@ static int cpu_post_save(void *opaque)
 {
     ARMCPU *cpu = opaque;
 
-    if (!kvm_enabled()) {
+    if (tcg_enabled()) {
         pmu_op_finish(&cpu->env);
     }
 
@@ -689,7 +690,7 @@ static int cpu_pre_load(void *opaque)
      */
     env->irq_line_state = UINT32_MAX;
 
-    if (!kvm_enabled()) {
+    if (tcg_enabled()) {
         pmu_op_start(&cpu->env);
     }
 
@@ -759,13 +760,13 @@ static int cpu_post_load(void *opaque, int version_id)
         }
     }
 
-    hw_breakpoint_update_all(cpu);
-    hw_watchpoint_update_all(cpu);
+    if (tcg_enabled()) {
+        hw_breakpoint_update_all(cpu);
+        hw_watchpoint_update_all(cpu);
 
-    if (!kvm_enabled()) {
         pmu_op_finish(&cpu->env);
+        arm_rebuild_hflags(&cpu->env);
     }
-    arm_rebuild_hflags(&cpu->env);
 
     return 0;
 }
@@ -815,8 +816,13 @@ const VMStateDescription vmstate_arm_cpu = {
         VMSTATE_UINT32(env.exception.syndrome, ARMCPU),
         VMSTATE_UINT32(env.exception.fsr, ARMCPU),
         VMSTATE_UINT64(env.exception.vaddress, ARMCPU),
+#ifdef CONFIG_TCG
         VMSTATE_TIMER_PTR(gt_timer[GTIMER_PHYS], ARMCPU),
         VMSTATE_TIMER_PTR(gt_timer[GTIMER_VIRT], ARMCPU),
+#else
+        VMSTATE_UNUSED(sizeof(QEMUTimer *)),
+        VMSTATE_UNUSED(sizeof(QEMUTimer *)),
+#endif /* CONFIG_TCG */
         {
             .name = "power_state",
             .version_id = 0,
-- 
2.26.2



  parent reply	other threads:[~2021-03-22 14:33 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-22 14:01 [RFC v10 00/49] arm cleanup experiment for kvm-only build Claudio Fontana
2021-03-22 14:01 ` [RFC v10 01/49] target/arm: move translate modules to tcg/ Claudio Fontana
2021-03-22 16:27   ` Alex Bennée
2021-03-22 14:01 ` [RFC v10 02/49] target/arm: move helpers " Claudio Fontana
2021-03-22 16:29   ` Alex Bennée
2021-03-22 14:01 ` [RFC v10 03/49] arm: tcg: only build under CONFIG_TCG Claudio Fontana
2021-03-22 16:32   ` Alex Bennée
2021-03-22 14:01 ` [RFC v10 04/49] target/arm: tcg: add sysemu and user subsirs Claudio Fontana
2021-03-22 16:32   ` Alex Bennée
2021-03-22 14:01 ` [RFC v10 05/49] target/arm: only build psci for TCG Claudio Fontana
2021-03-22 14:01 ` [RFC v10 06/49] target/arm: split off cpu-sysemu.c Claudio Fontana
2021-03-22 17:17   ` Alex Bennée
2021-03-22 14:01 ` [RFC v10 07/49] target/arm: move physical address translation to cpu-mmu Claudio Fontana
2021-03-22 14:01 ` [RFC v10 08/49] target/arm: cpu-mmu: fix comment style Claudio Fontana
2021-03-22 14:01 ` [RFC v10 09/49] target/arm: split cpregs from tcg/helper.c Claudio Fontana
2021-03-22 14:01 ` [RFC v10 10/49] target/arm: cpregs: fix style (mostly just comments) Claudio Fontana
2021-03-22 14:01 ` [RFC v10 11/49] target/arm: move cpu definitions to common cpu module Claudio Fontana
2021-03-22 14:01 ` Claudio Fontana [this message]
2021-03-22 14:01 ` [RFC v10 13/49] target/arm: kvm: add stubs for some helpers Claudio Fontana
2021-03-22 14:01 ` [RFC v10 14/49] target/arm: move cpsr_read, cpsr_write to cpu_common Claudio Fontana
2021-03-22 14:01 ` [RFC v10 15/49] target/arm: add temporary stub for arm_rebuild_hflags Claudio Fontana
2021-03-22 14:01 ` [RFC v10 16/49] target/arm: split vfp state setting from tcg helpers Claudio Fontana
2021-03-22 14:01 ` [RFC v10 17/49] target/arm: move arm_mmu_idx* to cpu-mmu Claudio Fontana
2021-03-22 14:01 ` [RFC v10 18/49] target/arm: move sve_zcr_len_for_el to common_cpu Claudio Fontana
2021-03-22 14:01 ` [RFC v10 19/49] target/arm: move arm_sctlr away from tcg helpers Claudio Fontana
2021-03-22 14:01 ` [RFC v10 20/49] target/arm: move arm_cpu_list to common_cpu Claudio Fontana
2021-03-22 14:01 ` [RFC v10 21/49] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code Claudio Fontana
2021-03-22 14:01 ` [RFC v10 22/49] target/arm: split a15 cpu model and 32bit class functions to cpu32.c Claudio Fontana
2021-03-22 14:01 ` [RFC v10 23/49] target/arm: move sve_exception_el out of TCG helpers Claudio Fontana
2021-03-22 14:01 ` [RFC v10 24/49] target/arm: refactor exception and cpu code Claudio Fontana
2021-03-22 14:01 ` [RFC v10 25/49] target/arm: cpu: fix style Claudio Fontana
2021-03-22 14:01 ` [RFC v10 26/49] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Claudio Fontana
2021-03-22 14:01 ` [RFC v10 27/49] target/arm: remove kvm include file for PSCI and arm-powerctl Claudio Fontana
2021-03-22 14:01 ` [RFC v10 28/49] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/ Claudio Fontana
2021-03-22 14:01 ` [RFC v10 29/49] target/arm: cleanup cpu includes Claudio Fontana
2021-03-22 14:01 ` [RFC v10 30/49] target/arm: remove broad "else" statements when checking accels Claudio Fontana
2021-03-22 14:01 ` [RFC v10 31/49] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM Claudio Fontana
2021-03-22 14:01 ` [RFC v10 32/49] tests: restrict TCG-only arm-cpu-features tests to TCG builds Claudio Fontana
2021-03-22 14:01 ` [RFC v10 33/49] tests: do not run test-hmp on all machines for ARM KVM-only Claudio Fontana
2021-03-22 14:01 ` [RFC v10 34/49] tests: device-introspect-test: cope with ARM TCG-only devices Claudio Fontana
2021-03-22 14:01 ` [RFC v10 35/49] tests: do not run qom-test on all machines for ARM KVM-only Claudio Fontana
2021-03-22 14:01 ` [RFC v10 36/49] Revert "target/arm: Restrict v8M IDAU to TCG" Claudio Fontana
2021-03-22 14:01 ` [RFC v10 37/49] target/arm: create kvm cpu accel class Claudio Fontana
2021-03-22 14:01 ` [RFC v10 38/49] target/arm: move kvm post init initialization to kvm cpu accel Claudio Fontana
2021-03-22 14:01 ` [RFC v10 39/49] target/arm: add tcg cpu accel class Claudio Fontana
2021-03-23 19:26   ` Alex Bennée
2021-03-23 19:33     ` Claudio Fontana
2021-03-22 14:01 ` [RFC v10 40/49] target/arm: move TCG gt timer creation code in tcg/ Claudio Fontana
2021-03-22 14:01 ` [RFC v10 41/49] target/arm: cpu-sve: new module Claudio Fontana
2021-03-22 14:01 ` [RFC v10 42/49] target/arm: cpu-sve: split TCG and KVM functionality Claudio Fontana
2021-03-22 14:02 ` [RFC v10 43/49] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64 Claudio Fontana
2021-03-22 14:02 ` [RFC v10 44/49] target/arm: arch_dump: restrict ELFCLASS64 to AArch64 Claudio Fontana
2021-03-22 14:02 ` [RFC v10 45/49] target/arm: cpu-exceptions: new module Claudio Fontana
2021-03-22 14:02 ` [RFC v10 46/49] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64 Claudio Fontana
2021-03-22 14:02 ` [RFC v10 47/49] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication Claudio Fontana
2021-03-22 14:02 ` [RFC v10 48/49] target/arm: refactor arm_cpu_finalize_features into cpu64 Claudio Fontana
2021-03-22 14:02 ` [RFC v10 49/49] XXX target/arm: experiment refactoring cpu "max" Claudio Fontana
2021-03-23 18:35 ` [RFC v10 00/49] arm cleanup experiment for kvm-only build Alex Bennée
2021-03-23 19:20   ` Claudio Fontana
2021-03-23 19:38     ` Richard Henderson

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