From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au
Subject: [PATCH v5 04/10] target/ppc: Put dbcr0 single-step bits into hflags
Date: Tue, 23 Mar 2021 12:43:34 -0600 [thread overview]
Message-ID: <20210323184340.619757-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210323184340.619757-1-richard.henderson@linaro.org>
Because these bits were not in hflags, the code generated
for single-stepping on BookE was essentially random.
Recompute hflags when storing to dbcr0.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/helper_regs.c | 24 +++++++++++++++++-------
target/ppc/misc_helper.c | 3 +++
target/ppc/translate.c | 11 -----------
3 files changed, 20 insertions(+), 18 deletions(-)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index df9673b90f..e345966b6b 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -114,13 +114,23 @@ void hreg_compute_hflags(CPUPPCState *env)
hflags |= le << MSR_LE;
}
- if (ppc_flags & POWERPC_FLAG_BE) {
- QEMU_BUILD_BUG_ON(MSR_BE != HFLAGS_BE);
- msr_mask |= 1 << MSR_BE;
- }
- if (ppc_flags & POWERPC_FLAG_SE) {
- QEMU_BUILD_BUG_ON(MSR_SE != HFLAGS_SE);
- msr_mask |= 1 << MSR_SE;
+ if (ppc_flags & POWERPC_FLAG_DE) {
+ target_ulong dbcr0 = env->spr[SPR_BOOKE_DBCR0];
+ if (dbcr0 & DBCR0_ICMP) {
+ hflags |= 1 << HFLAGS_SE;
+ }
+ if (dbcr0 & DBCR0_BRT) {
+ hflags |= 1 << HFLAGS_BE;
+ }
+ } else {
+ if (ppc_flags & POWERPC_FLAG_BE) {
+ QEMU_BUILD_BUG_ON(MSR_BE != HFLAGS_BE);
+ msr_mask |= 1 << MSR_BE;
+ }
+ if (ppc_flags & POWERPC_FLAG_SE) {
+ QEMU_BUILD_BUG_ON(MSR_SE != HFLAGS_SE);
+ msr_mask |= 1 << MSR_SE;
+ }
}
if (msr_is_64bit(env, msr)) {
diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
index b04b4d7c6e..002958be26 100644
--- a/target/ppc/misc_helper.c
+++ b/target/ppc/misc_helper.c
@@ -215,6 +215,9 @@ void helper_store_403_pbr(CPUPPCState *env, uint32_t num, target_ulong value)
void helper_store_40x_dbcr0(CPUPPCState *env, target_ulong val)
{
+ /* Bits 26 & 27 affect single-stepping. */
+ hreg_compute_hflags(env);
+ /* Bits 28 & 29 affect reset or shutdown. */
store_40x_dbcr0(env, val);
}
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index a85b890bb0..7912495f28 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -7923,17 +7923,6 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
if ((hflags >> HFLAGS_BE) & 1) {
ctx->singlestep_enabled |= CPU_BRANCH_STEP;
}
- if ((env->flags & POWERPC_FLAG_DE) && msr_de) {
- ctx->singlestep_enabled = 0;
- target_ulong dbcr0 = env->spr[SPR_BOOKE_DBCR0];
- if (dbcr0 & DBCR0_ICMP) {
- ctx->singlestep_enabled |= CPU_SINGLE_STEP;
- }
- if (dbcr0 & DBCR0_BRT) {
- ctx->singlestep_enabled |= CPU_BRANCH_STEP;
- }
-
- }
if (unlikely(ctx->base.singlestep_enabled)) {
ctx->singlestep_enabled |= GDBSTUB_SINGLE_STEP;
}
--
2.25.1
next prev parent reply other threads:[~2021-03-23 19:34 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 18:43 [PATCH v5 00/10] target/ppc: Fix truncation of env->hflags Richard Henderson
2021-03-23 18:43 ` [PATCH v5 01/10] target/ppc: Extract post_load_update_msr Richard Henderson
2021-03-24 0:00 ` David Gibson
2021-03-23 18:43 ` [PATCH v5 02/10] target/ppc: Disconnect hflags from MSR Richard Henderson
2021-03-24 0:03 ` David Gibson
2021-03-29 13:05 ` Greg Kurz
2021-03-29 16:26 ` Richard Henderson
2021-03-30 4:54 ` David Gibson
2021-03-30 15:01 ` Richard Henderson
2021-03-31 0:09 ` David Gibson
2021-03-31 4:04 ` Greg Kurz
2021-03-31 4:47 ` David Gibson
2021-03-31 6:31 ` Richard Henderson
2021-04-01 3:17 ` David Gibson
2021-03-31 7:30 ` Greg Kurz
2021-03-23 18:43 ` [PATCH v5 03/10] target/ppc: Reduce env->hflags to uint32_t Richard Henderson
2021-03-24 0:03 ` David Gibson
2021-03-23 18:43 ` Richard Henderson [this message]
2021-03-24 0:04 ` [PATCH v5 04/10] target/ppc: Put dbcr0 single-step bits into hflags David Gibson
2021-03-23 18:43 ` [PATCH v5 05/10] target/ppc: Create helper_scv Richard Henderson
2021-03-24 0:05 ` David Gibson
2021-03-23 18:43 ` [PATCH v5 06/10] target/ppc: Put LPCR[GTSE] in hflags Richard Henderson
2021-03-24 0:06 ` David Gibson
2021-03-23 18:43 ` [PATCH v5 07/10] target/ppc: Remove MSR_SA and MSR_AP from hflags Richard Henderson
2021-03-24 0:08 ` David Gibson
2021-03-23 18:43 ` [PATCH v5 08/10] target/ppc: Remove env->immu_idx and env->dmmu_idx Richard Henderson
2021-03-24 0:09 ` David Gibson
2021-03-23 18:43 ` [PATCH v5 09/10] linux-user/ppc: Fix msr updates for signal handling Richard Henderson
2021-03-24 0:10 ` David Gibson
2021-03-23 18:43 ` [PATCH v5 10/10] target/ppc: Validate hflags with CONFIG_DEBUG_TCG Richard Henderson
2021-03-24 0:12 ` David Gibson
2021-03-25 8:47 ` David Gibson
2021-03-26 12:41 ` Richard Henderson
2021-03-27 12:46 ` Richard Henderson
2021-03-28 13:09 ` David Gibson
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