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* [PATCH V5] target/riscv: Align the data type of reset vector address
@ 2021-03-29  3:48 Dylan Jhong
  2021-03-29  7:15 ` Bin Meng
  2021-03-30 16:30 ` Alistair Francis
  0 siblings, 2 replies; 3+ messages in thread
From: Dylan Jhong @ 2021-03-29  3:48 UTC (permalink / raw)
  To: qemu-riscv, qemu-devel, kbastian, sagark, Alistair.Francis,
	palmer
  Cc: peter.maydell, alankao, Dylan Jhong, x5710999x, ruinland,
	bmeng.cn

Use target_ulong to instead of uint64_t on reset vector address
to adapt on both 32/64 machine.

Signed-off-by: Dylan Jhong <dylan@andestech.com>
Signed-off-by: Ruinland ChuanTzu Tsai <ruinland@andestech.com>
---
 target/riscv/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 7d6ed80f6b..4ac901245a 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -137,7 +137,7 @@ static void set_feature(CPURISCVState *env, int feature)
     env->features |= (1ULL << feature);
 }
 
-static void set_resetvec(CPURISCVState *env, int resetvec)
+static void set_resetvec(CPURISCVState *env, target_ulong resetvec)
 {
 #ifndef CONFIG_USER_ONLY
     env->resetvec = resetvec;
-- 
2.17.1



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2021-03-29  3:48 [PATCH V5] target/riscv: Align the data type of reset vector address Dylan Jhong
2021-03-29  7:15 ` Bin Meng
2021-03-30 16:30 ` Alistair Francis

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