From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 1/5] net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set
Date: Tue, 30 Mar 2021 14:25:51 +0100 [thread overview]
Message-ID: <20210330132555.8144-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210330132555.8144-1-peter.maydell@linaro.org>
From: Doug Evans <dje@google.com>
Turning REG_MCMDR_RXON is enough to start receiving packets.
Signed-off-by: Doug Evans <dje@google.com>
Message-id: 20210319195044.741821-1-dje@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/net/npcm7xx_emc.c | 4 +++-
tests/qtest/npcm7xx_emc-test.c | 30 +++++++++++++++++++++---------
2 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/hw/net/npcm7xx_emc.c b/hw/net/npcm7xx_emc.c
index 714a742ba7a..7c892f820fb 100644
--- a/hw/net/npcm7xx_emc.c
+++ b/hw/net/npcm7xx_emc.c
@@ -702,7 +702,9 @@ static void npcm7xx_emc_write(void *opaque, hwaddr offset,
!(value & REG_MCMDR_RXON)) {
emc->regs[REG_MGSTA] |= REG_MGSTA_RXHA;
}
- if (!(value & REG_MCMDR_RXON)) {
+ if (value & REG_MCMDR_RXON) {
+ emc->rx_active = true;
+ } else {
emc_halt_rx(emc, 0);
}
break;
diff --git a/tests/qtest/npcm7xx_emc-test.c b/tests/qtest/npcm7xx_emc-test.c
index 7a281731950..9eec71d87c1 100644
--- a/tests/qtest/npcm7xx_emc-test.c
+++ b/tests/qtest/npcm7xx_emc-test.c
@@ -492,9 +492,6 @@ static void enable_tx(QTestState *qts, const EMCModule *mod,
mcmdr |= REG_MCMDR_TXON;
emc_write(qts, mod, REG_MCMDR, mcmdr);
}
-
- /* Prod the device to send the packet. */
- emc_write(qts, mod, REG_TSDR, 1);
}
static void emc_send_verify1(QTestState *qts, const EMCModule *mod, int fd,
@@ -558,6 +555,9 @@ static void emc_send_verify(QTestState *qts, const EMCModule *mod, int fd,
enable_tx(qts, mod, &desc[0], NUM_TX_DESCRIPTORS, desc_addr,
with_irq ? REG_MIEN_ENTXINTR : 0);
+ /* Prod the device to send the packet. */
+ emc_write(qts, mod, REG_TSDR, 1);
+
/*
* It's problematic to observe the interrupt for each packet.
* Instead just wait until all the packets go out.
@@ -643,13 +643,10 @@ static void enable_rx(QTestState *qts, const EMCModule *mod,
mcmdr |= REG_MCMDR_RXON | mcmdr_flags;
emc_write(qts, mod, REG_MCMDR, mcmdr);
}
-
- /* Prod the device to accept a packet. */
- emc_write(qts, mod, REG_RSDR, 1);
}
static void emc_recv_verify(QTestState *qts, const EMCModule *mod, int fd,
- bool with_irq)
+ bool with_irq, bool pump_rsdr)
{
NPCM7xxEMCRxDesc desc[NUM_RX_DESCRIPTORS];
uint32_t desc_addr = DESC_ADDR;
@@ -679,6 +676,15 @@ static void emc_recv_verify(QTestState *qts, const EMCModule *mod, int fd,
enable_rx(qts, mod, &desc[0], NUM_RX_DESCRIPTORS, desc_addr,
with_irq ? REG_MIEN_ENRXINTR : 0, 0);
+ /*
+ * If requested, prod the device to accept a packet.
+ * This isn't necessary, the linux driver doesn't do this.
+ * Test doing/not-doing this for robustness.
+ */
+ if (pump_rsdr) {
+ emc_write(qts, mod, REG_RSDR, 1);
+ }
+
/* Send test packet to device's socket. */
ret = iov_send(fd, iov, 2, 0, sizeof(len) + sizeof(test));
g_assert_cmpint(ret, == , sizeof(test) + sizeof(len));
@@ -826,8 +832,14 @@ static void test_rx(gconstpointer test_data)
qtest_irq_intercept_in(qts, "/machine/soc/a9mpcore/gic");
- emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/false);
- emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/true);
+ emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/false,
+ /*pump_rsdr=*/false);
+ emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/false,
+ /*pump_rsdr=*/true);
+ emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/true,
+ /*pump_rsdr=*/false);
+ emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/true,
+ /*pump_rsdr=*/true);
emc_test_ptle(qts, td->module, test_sockets[0]);
qtest_quit(qts);
--
2.20.1
next prev parent reply other threads:[~2021-03-30 13:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-30 13:25 [PULL 0/5] target-arm queue Peter Maydell
2021-03-30 13:25 ` Peter Maydell [this message]
2021-03-30 13:25 ` [PULL 2/5] hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize() Peter Maydell
2021-03-30 13:25 ` [PULL 3/5] hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid() Peter Maydell
2021-03-30 13:25 ` [PULL 4/5] target/arm: Make number of counters in PMCR follow the CPU Peter Maydell
2021-03-30 13:25 ` [PULL 5/5] hw/timer/renesas_tmr: Add default-case asserts in read_tcnt() Peter Maydell
2021-03-30 17:13 ` [PULL 0/5] target-arm queue Peter Maydell
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