From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBCABC433ED for ; Tue, 6 Apr 2021 07:25:00 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3C5246138B for ; Tue, 6 Apr 2021 07:25:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3C5246138B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:40930 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lTg55-0002eM-AC for qemu-devel@archiver.kernel.org; Tue, 06 Apr 2021 03:24:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48710) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lTg3W-00022n-Pu for qemu-devel@nongnu.org; Tue, 06 Apr 2021 03:23:22 -0400 Received: from mga01.intel.com ([192.55.52.88]:35294) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lTg3R-0005sm-NM for qemu-devel@nongnu.org; Tue, 06 Apr 2021 03:23:21 -0400 IronPort-SDR: wZgWOll5bPMKyRYZZk2TVfvfc47PO69evsg3ZHN+pHM49LKTLZvx60VlMVR4rS2LNlhp+6nPhu oOKMzzaW9+rA== X-IronPort-AV: E=McAfee;i="6000,8403,9945"; a="213366592" X-IronPort-AV: E=Sophos;i="5.81,308,1610438400"; d="scan'208";a="213366592" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Apr 2021 00:23:11 -0700 IronPort-SDR: raszK+IKOKAv2PJQoy3ZkVk5tfsFXrkPlFB0Qurc3kya1HKjB/HaKY4DCG99NUD/PwCEb0TClK zBDB0oGQBT9Q== X-IronPort-AV: E=Sophos;i="5.81,308,1610438400"; d="scan'208";a="414652330" Received: from yangzhon-virtual.bj.intel.com (HELO yangzhon-Virtual) ([10.238.144.101]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-SHA256; 06 Apr 2021 00:23:09 -0700 Date: Tue, 6 Apr 2021 15:11:00 +0800 From: Yang Zhong To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Subject: Re: [PATCH] i386/cpu: Expose AVX_VNNI instruction to guset Message-ID: <20210406071100.GA22954@yangzhon-Virtual> References: <20210406015757.25718-1-yang.zhong@intel.com> <35eb247d-55be-981a-8818-16aceb84cf82@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <35eb247d-55be-981a-8818-16aceb84cf82@redhat.com> User-Agent: Mutt/1.5.21 (2010-09-15) Received-SPF: pass client-ip=192.55.52.88; envelope-from=yang.zhong@intel.com; helo=mga01.intel.com X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, bonzini@gnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, Apr 06, 2021 at 09:15:44AM +0200, Philippe Mathieu-Daudé wrote: > Typo "guest" in subject. > Philippe, thanks for your comments! It's my fault, let me change it and if there is no any other issue , i will send new version tomorrow. thanks! Yang > On 4/6/21 3:57 AM, Yang Zhong wrote: > > Expose AVX (VEX-encoded) versions of the Vector Neural Network > > Instructions to guest.> > > The bit definition: > > CPUID.(EAX=7,ECX=1):EAX[bit 4] AVX_VNNI > > > > The following instructions are available when this feature is > > present in the guest. > > 1. VPDPBUS: Multiply and Add Unsigned and Signed Bytes > > 2. VPDPBUSDS: Multiply and Add Unsigned and Signed Bytes with Saturation > > 3. VPDPWSSD: Multiply and Add Signed Word Integers > > 4. VPDPWSSDS: Multiply and Add Signed Integers with Saturation > > > > As for the kvm related code, please reference Linux commit id 1085a6b585d7. > > > > The release document ref below link: > > https://software.intel.com/content/www/us/en/develop/download/\ > > intel-architecture-instruction-set-extensions-programming-reference.html > > > > Signed-off-by: Yang Zhong > > --- > > target/i386/cpu.c | 4 ++-- > > target/i386/cpu.h | 2 ++ > > 2 files changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > > index 6b3e9467f1..f0c48f06a2 100644 > > --- a/target/i386/cpu.c > > +++ b/target/i386/cpu.c > > @@ -996,7 +996,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { > > .type = CPUID_FEATURE_WORD, > > .feat_names = { > > NULL, NULL, NULL, NULL, > > - NULL, "avx512-bf16", NULL, NULL, > > + "avx-vnni", "avx512-bf16", NULL, NULL, > > NULL, NULL, NULL, NULL, > > NULL, NULL, NULL, NULL, > > NULL, NULL, NULL, NULL, > > @@ -3273,7 +3273,7 @@ static X86CPUDefinition builtin_x86_defs[] = { > > MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO | > > MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO, > > .features[FEAT_7_1_EAX] = > > - CPUID_7_1_EAX_AVX512_BF16, > > + CPUID_7_1_EAX_AVX_VNNI | CPUID_7_1_EAX_AVX512_BF16, > > /* > > * Missing: XSAVES (not supported by some Linux versions, > > * including v4.1 to v4.12). > > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > > index 570f916878..edc8984448 100644 > > --- a/target/i386/cpu.h > > +++ b/target/i386/cpu.h > > @@ -804,6 +804,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; > > /* Speculative Store Bypass Disable */ > > #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) > > > > +/* AVX VNNI Instruction */ > > +#define CPUID_7_1_EAX_AVX_VNNI (1U << 4) > > /* AVX512 BFloat16 Instruction */ > > #define CPUID_7_1_EAX_AVX512_BF16 (1U << 5) > > > >