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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id p16sm19574680wrt.54.2021.04.12.06.43.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Apr 2021 06:43:19 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 0/3] mps3-an524: support memory remapping Date: Mon, 12 Apr 2021 14:43:14 +0100 Message-Id: <20210412134317.12501-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kumar Gala , Kevin Townsend Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The AN524 FPGA image supports two memory maps, which differ in where the QSPI and BRAM are. In the default map, the BRAM is at 0x0000_0000, and the QSPI at 0x2800_0000. In the second map, they are the other way around. In hardware, the initial mapping can be selected by the user by writing either "REMAP: BRAM" (the default) or "REMAP: QSPI" in the board configuration file. The guest can also dynamically change the mapping via the SCC CFG_REG0 register. This patchset adds support for the feature to QEMU's model; the user-sets-the-initial-mapping part is a new machine property which can be set with "-M remap=QSPI". This is needed for some guest images -- for instance the Arm TF-M binaries -- which assume they have the QSPI layout. Based-on: 20210409150527.15053-1-peter.maydell@linaro.org ("mps3-an524: Fix MPC setting for SRAM block") though any conflict/dependency would be minor and purely textual. thanks -- PMM Peter Maydell (3): hw/misc/mps2-scc: Add "QEMU interface" comment hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping hw/arm/mps2-tz: Implement AN524 memory remapping via machine property docs/system/arm/mps2.rst | 10 ++++ include/hw/misc/mps2-scc.h | 21 ++++++++ hw/arm/mps2-tz.c | 106 ++++++++++++++++++++++++++++++++++++- hw/misc/mps2-scc.c | 13 +++-- 4 files changed, 146 insertions(+), 4 deletions(-) -- 2.20.1