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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Alex Bennée" <alex.bennee@linaro.org>
Subject: [PULL 5/7] hw/arm/armsse: Make SSE-300 use Cortex-M55
Date: Sat, 17 Apr 2021 20:42:03 +0100	[thread overview]
Message-ID: <20210417194205.17057-6-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210417194205.17057-1-peter.maydell@linaro.org>

The SSE-300 has a Cortex-M55 (which was the whole reason for us
modelling it), but we forgot to actually update the code to let it
have a different CPU type from the IoTKit and SSE-200.  Add CPU type
as a field for ARMSSEInfo instead of hardcoding it to always use a
Cortex-M33.

Buglink: https://bugs.launchpad.net/qemu/+bug/1923861
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210416104010.13228-1-peter.maydell@linaro.org
---
 hw/arm/armsse.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 170dea8632d..2e5d0679e7b 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -56,6 +56,7 @@ typedef struct ARMSSEDeviceInfo {
 
 struct ARMSSEInfo {
     const char *name;
+    const char *cpu_type;
     uint32_t sse_version;
     int sram_banks;
     int num_cpus;
@@ -501,6 +502,7 @@ static const ARMSSEInfo armsse_variants[] = {
     {
         .name = TYPE_IOTKIT,
         .sse_version = ARMSSE_IOTKIT,
+        .cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"),
         .sram_banks = 1,
         .num_cpus = 1,
         .sys_version = 0x41743,
@@ -519,6 +521,7 @@ static const ARMSSEInfo armsse_variants[] = {
     {
         .name = TYPE_SSE200,
         .sse_version = ARMSSE_SSE200,
+        .cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"),
         .sram_banks = 4,
         .num_cpus = 2,
         .sys_version = 0x22041743,
@@ -537,6 +540,7 @@ static const ARMSSEInfo armsse_variants[] = {
     {
         .name = TYPE_SSE300,
         .sse_version = ARMSSE_SSE300,
+        .cpu_type = ARM_CPU_TYPE_NAME("cortex-m55"),
         .sram_banks = 2,
         .num_cpus = 1,
         .sys_version = 0x7e00043b,
@@ -719,8 +723,7 @@ static void armsse_init(Object *obj)
         name = g_strdup_printf("armv7m%d", i);
         object_initialize_child(OBJECT(&s->cluster[i]), name, &s->armv7m[i],
                                 TYPE_ARMV7M);
-        qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type",
-                             ARM_CPU_TYPE_NAME("cortex-m33"));
+        qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type", info->cpu_type);
         g_free(name);
         name = g_strdup_printf("arm-sse-cpu-container%d", i);
         memory_region_init(&s->cpu_container[i], obj, name, UINT64_MAX);
-- 
2.20.1



  parent reply	other threads:[~2021-04-17 19:45 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-17 19:41 [PULL 0/7] queue of proposed rc4 fixes Peter Maydell
2021-04-17 19:41 ` [PULL 1/7] osdep: include glib-compat.h before other QEMU headers Peter Maydell
2021-04-17 19:42 ` [PULL 2/7] osdep: protect qemu/osdep.h with extern "C" Peter Maydell
2021-04-17 19:42 ` [PULL 3/7] include/qemu/osdep.h: Move system includes to top Peter Maydell
2021-04-17 19:42 ` [PULL 4/7] hw/arm/armsse: Give SSE-300 its own Property array Peter Maydell
2021-04-17 19:42 ` Peter Maydell [this message]
2021-04-17 19:42 ` [PULL 6/7] target/arm: drop CF_LAST_IO/dc->condjump check Peter Maydell
2021-04-17 19:42 ` [PULL 7/7] accel/tcg: avoid re-translating one-shot instructions Peter Maydell
2021-04-17 19:51 ` [PULL 0/7] queue of proposed rc4 fixes no-reply
2021-04-18  5:17 ` Philippe Mathieu-Daudé
2021-04-19  9:54   ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` Alex Bennée
2021-04-19  9:18   ` Peter Maydell
2021-04-19 10:53 ` Thomas Huth
2021-04-19 14:48 ` Peter Maydell

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