From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Sagar Karandikar" <sagark@eecs.berkeley.edu>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Juan Quintela" <quintela@redhat.com>,
"David Hildenbrand" <david@redhat.com>,
"Claudio Fontana" <cfontana@suse.de>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Thomas Huth" <thuth@redhat.com>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Greg Kurz" <groug@kaod.org>,
qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
"David Gibson" <david@gibson.dropbear.id.au>,
qemu-riscv@nongnu.org,
"Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>,
"Cornelia Huck" <cohuck@redhat.com>,
"Laurent Vivier" <laurent@vivier.eu>,
qemu-ppc@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>
Subject: [PATCH v5 10/15] cpu: Move CPUClass::write_elf* to SysemuCPUOps
Date: Thu, 22 Apr 2021 12:46:59 +0200 [thread overview]
Message-ID: <20210422104705.2454166-11-f4bug@amsat.org> (raw)
In-Reply-To: <20210422104705.2454166-1-f4bug@amsat.org>
The write_elf*() handlers are used to dump vmcore images.
This feature is only meaningful for system emulation.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v4: Added target/riscv/cpu.c after rebasing
---
include/hw/core/cpu.h | 17 -----------------
include/hw/core/sysemu-cpu-ops.h | 24 ++++++++++++++++++++++++
hw/core/cpu.c | 16 ++++++++--------
target/arm/cpu.c | 4 ++--
target/i386/cpu.c | 8 ++++----
target/riscv/cpu.c | 4 ++--
target/s390x/cpu.c | 2 +-
target/ppc/translate_init.c.inc | 6 ++----
8 files changed, 43 insertions(+), 38 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 4289cd0d78a..b7095bc4192 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -112,14 +112,6 @@ struct AccelCPUClass;
* a memory access with the specified memory transaction attributes.
* @gdb_read_register: Callback for letting GDB read a register.
* @gdb_write_register: Callback for letting GDB write a register.
- * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
- * 64-bit VM coredump.
- * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
- * note to a 32-bit VM coredump.
- * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
- * 32-bit VM coredump.
- * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
- * note to a 32-bit VM coredump.
* @gdb_num_core_regs: Number of core registers accessible to GDB.
* @gdb_core_xml_file: File name for core registers GDB XML description.
* @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
@@ -163,15 +155,6 @@ struct CPUClass {
int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
- int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
- int cpuid, void *opaque);
- int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
- void *opaque);
- int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
- int cpuid, void *opaque);
- int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
- void *opaque);
-
const char *gdb_core_xml_file;
gchar * (*gdb_arch_name)(CPUState *cpu);
const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h
index b9ffca07665..60c667801ef 100644
--- a/include/hw/core/sysemu-cpu-ops.h
+++ b/include/hw/core/sysemu-cpu-ops.h
@@ -21,6 +21,30 @@ typedef struct SysemuCPUOps {
* GUEST_PANICKED events.
*/
GuestPanicInformation* (*get_crash_info)(CPUState *cpu);
+ /**
+ * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
+ * 32-bit VM coredump.
+ */
+ int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
+ int cpuid, void *opaque);
+ /**
+ * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
+ * 64-bit VM coredump.
+ */
+ int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
+ int cpuid, void *opaque);
+ /**
+ * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
+ * note to a 32-bit VM coredump.
+ */
+ int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
+ void *opaque);
+ /**
+ * @write_elf64_qemunote: Callback for writing a CPU- and QEMU-specific ELF
+ * note to a 64-bit VM coredump.
+ */
+ int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
+ void *opaque);
/**
* @virtio_is_big_endian: Callback to return %true if a CPU which supports
* runtime configurable endianness is currently big-endian.
diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index 0aebc18c41f..c74390aafbf 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -151,10 +151,10 @@ int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
{
CPUClass *cc = CPU_GET_CLASS(cpu);
- if (!cc->write_elf32_qemunote) {
+ if (!cc->sysemu_ops->write_elf32_qemunote) {
return 0;
}
- return (*cc->write_elf32_qemunote)(f, cpu, opaque);
+ return (*cc->sysemu_ops->write_elf32_qemunote)(f, cpu, opaque);
}
int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
@@ -162,10 +162,10 @@ int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
{
CPUClass *cc = CPU_GET_CLASS(cpu);
- if (!cc->write_elf32_note) {
+ if (!cc->sysemu_ops->write_elf32_note) {
return -1;
}
- return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
+ return (*cc->sysemu_ops->write_elf32_note)(f, cpu, cpuid, opaque);
}
int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
@@ -173,10 +173,10 @@ int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
{
CPUClass *cc = CPU_GET_CLASS(cpu);
- if (!cc->write_elf64_qemunote) {
+ if (!cc->sysemu_ops->write_elf64_qemunote) {
return 0;
}
- return (*cc->write_elf64_qemunote)(f, cpu, opaque);
+ return (*cc->sysemu_ops->write_elf64_qemunote)(f, cpu, opaque);
}
int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
@@ -184,10 +184,10 @@ int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
{
CPUClass *cc = CPU_GET_CLASS(cpu);
- if (!cc->write_elf64_note) {
+ if (!cc->sysemu_ops->write_elf64_note) {
return -1;
}
- return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
+ return (*cc->sysemu_ops->write_elf64_note)(f, cpu, cpuid, opaque);
}
static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index edefcc340af..326ed9180cc 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1945,6 +1945,8 @@ static gchar *arm_gdb_arch_name(CPUState *cs)
#ifndef CONFIG_USER_ONLY
static const struct SysemuCPUOps arm_sysemu_ops = {
+ .write_elf32_note = arm_cpu_write_elf32_note,
+ .write_elf64_note = arm_cpu_write_elf64_note,
.virtio_is_big_endian = arm_cpu_virtio_is_big_endian,
.vmsd = &vmstate_arm_cpu,
};
@@ -1989,8 +1991,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug;
cc->asidx_from_attrs = arm_asidx_from_attrs;
- cc->write_elf64_note = arm_cpu_write_elf64_note;
- cc->write_elf32_note = arm_cpu_write_elf32_note;
cc->sysemu_ops = &arm_sysemu_ops;
#endif
cc->gdb_num_core_regs = 26;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 538104d4557..4ee64461b43 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7394,6 +7394,10 @@ static Property x86_cpu_properties[] = {
#ifndef CONFIG_USER_ONLY
static const struct SysemuCPUOps i386_sysemu_ops = {
.get_crash_info = x86_cpu_get_crash_info,
+ .write_elf32_note = x86_cpu_write_elf32_note,
+ .write_elf64_note = x86_cpu_write_elf64_note,
+ .write_elf32_qemunote = x86_cpu_write_elf32_qemunote,
+ .write_elf64_qemunote = x86_cpu_write_elf64_qemunote,
.vmsd = &vmstate_x86_cpu,
};
#endif
@@ -7433,10 +7437,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
cc->asidx_from_attrs = x86_asidx_from_attrs;
cc->get_memory_mapping = x86_cpu_get_memory_mapping;
cc->get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug;
- cc->write_elf64_note = x86_cpu_write_elf64_note;
- cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote;
- cc->write_elf32_note = x86_cpu_write_elf32_note;
- cc->write_elf32_qemunote = x86_cpu_write_elf32_qemunote;
cc->sysemu_ops = &i386_sysemu_ops;
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 5d3a8dc2be4..8734e530cc5 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -583,6 +583,8 @@ static const char *riscv_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname)
#ifndef CONFIG_USER_ONLY
static const struct SysemuCPUOps riscv_sysemu_ops = {
+ .write_elf64_note = riscv_cpu_write_elf64_note,
+ .write_elf32_note = riscv_cpu_write_elf32_note,
/* For now, mark unmigratable: */
.vmsd = &vmstate_riscv_cpu,
};
@@ -631,8 +633,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug;
cc->sysemu_ops = &riscv_sysemu_ops;
- cc->write_elf64_note = riscv_cpu_write_elf64_note;
- cc->write_elf32_note = riscv_cpu_write_elf32_note;
#endif
cc->gdb_arch_name = riscv_gdb_arch_name;
cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml;
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index fdc169bb0ac..2b249f47eb9 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -480,6 +480,7 @@ static void s390_cpu_reset_full(DeviceState *dev)
#ifndef CONFIG_USER_ONLY
static const struct SysemuCPUOps s390_sysemu_ops = {
.get_crash_info = s390_cpu_get_crash_info,
+ .write_elf64_note = s390_cpu_write_elf64_note,
.vmsd = &vmstate_s390_cpu,
};
#endif
@@ -524,7 +525,6 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_write_register = s390_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
- cc->write_elf64_note = s390_cpu_write_elf64_note;
cc->sysemu_ops = &s390_sysemu_ops;
#endif
cc->disas_set_info = s390_cpu_disas_set_info;
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index b8a095d3f3a..a55d1c54fcf 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -10880,6 +10880,8 @@ static Property ppc_cpu_properties[] = {
#ifndef CONFIG_USER_ONLY
static const struct SysemuCPUOps ppc_sysemu_ops = {
+ .write_elf32_note = ppc32_cpu_write_elf32_note,
+ .write_elf64_note = ppc64_cpu_write_elf64_note,
.virtio_is_big_endian = ppc_cpu_is_big_endian,
.vmsd = &vmstate_ppc_cpu,
};
@@ -10929,10 +10931,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug;
cc->sysemu_ops = &ppc_sysemu_ops;
#endif
-#if defined(CONFIG_SOFTMMU)
- cc->write_elf64_note = ppc64_cpu_write_elf64_note;
- cc->write_elf32_note = ppc32_cpu_write_elf32_note;
-#endif
cc->gdb_num_core_regs = 71;
#ifndef CONFIG_USER_ONLY
--
2.26.3
next prev parent reply other threads:[~2021-04-22 10:53 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-22 10:46 [PATCH v5 00/15] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 01/15] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 02/15] cpu: Introduce cpu_virtio_is_big_endian() Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 03/15] cpu: Directly use cpu_write_elf*() fallback handlers in place Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 04/15] cpu: Directly use get_paging_enabled() " Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 05/15] cpu: Directly use get_memory_mapping() " Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 06/15] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 07/15] cpu: Move CPUClass::vmsd to SysemuCPUOps Philippe Mathieu-Daudé
2021-04-22 11:04 ` Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 08/15] cpu: Move CPUClass::virtio_is_big_endian " Philippe Mathieu-Daudé
2021-04-22 10:46 ` [PATCH v5 09/15] cpu: Move CPUClass::get_crash_info " Philippe Mathieu-Daudé
2021-04-22 10:46 ` Philippe Mathieu-Daudé [this message]
2021-04-22 10:47 ` [PATCH v5 11/15] cpu: Move CPUClass::asidx_from_attrs " Philippe Mathieu-Daudé
2021-04-22 10:47 ` [PATCH v5 12/15] cpu: Move CPUClass::get_phys_page_debug " Philippe Mathieu-Daudé
2021-04-22 10:47 ` [PATCH v5 13/15] cpu: Move CPUClass::get_memory_mapping " Philippe Mathieu-Daudé
2021-04-22 10:47 ` [PATCH v5 14/15] cpu: Move CPUClass::get_paging_enabled " Philippe Mathieu-Daudé
2021-04-22 10:47 ` [PATCH v5 15/15] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c Philippe Mathieu-Daudé
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