From: Greg Kurz <groug@kaod.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: "Kevin Wolf" <kwolf@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
qemu-block@nongnu.org,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Markus Armbruster" <armbru@redhat.com>,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Hervé Poussineau" <hpoussin@reactos.org>,
qemu-ppc@nongnu.org, "Max Reitz" <mreitz@redhat.com>,
"David Gibson" <david@gibson.dropbear.id.au>
Subject: Re: [PATCH 1/5] hw/ppc/spapr_iommu: Register machine reset handler
Date: Tue, 27 Apr 2021 12:27:00 +0200 [thread overview]
Message-ID: <20210427122700.60d0a82a@bahia.lan> (raw)
In-Reply-To: <9dcc20c7-6371-dc77-1cd4-706301ec5c54@amsat.org>
On Tue, 27 Apr 2021 11:20:07 +0200
Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> On 4/27/21 3:45 AM, David Gibson wrote:
> > On Sat, Apr 24, 2021 at 06:22:25PM +0200, Philippe Mathieu-Daudé wrote:
> >> The TYPE_SPAPR_TCE_TABLE device is bus-less, thus isn't reset
> >> automatically. Register a reset handler to get reset with the
> >> machine.
> >>
> >> It doesn't seem to be an issue because it is that way since the
> >> device QDev'ifycation 8 years ago, in commit a83000f5e3f
> >> ("spapr-tce: make sPAPRTCETable a proper device").
> >> Still, correct to have a proper API usage.
> >
> > So, the reason this works now is that we explicitly call
> > device_reset() on the TCE table from the TCE tables "owner", either a
> > PHB (spapr_phb_reset()) or a VIO device (spapr_vio_quiesce_one()).
> >
> > I think we want either that, or the register_reset(), not both.
>
> rtas_quiesce() seems to call a DeviceClass::reset() on the
> children of TYPE_SPAPR_VIO_BUS:
>
> Abstract TYPE_VIO_SPAPR_DEVICE has the TYPE_SPAPR_VIO_BUS bus_type,
> and registers the spapr_vio_busdev_reset() handler, which calls
> spapr_vio_quiesce_one()...
>
> So either we already have 2 resets, or the bus is never reset?
>
rtas_quiesce() is called when the guests definitively transition
from the SLOF FW to the OS. It isn't a true reset path actually,
even if it needs to reset a few devices.
On the other hand, your patch would _really_ cause the TCE table
device to be reset twice at machine reset AFAICT.
> The bus is created in spapr_machine_init():
>
> /* Set up VIO bus */
> spapr->vio_bus = spapr_vio_bus_init();
>
> TYPE_SPAPR_MACHINE class registers spapr_machine_reset(), which
> manually calls qemu_devices_reset() and spapr_drc_reset_all(),
> but I can't understand if a callee resets vio_bus...
The vio_bus *is* reset:
#0 0x0000000100629a98 in spapr_vio_busdev_reset (qdev=0x10165c400) at /home/greg/Work/qemu/qemu-virtiofs/include/hw/ppc/spapr_vio.h:31
#1 0x00000001009fd32c in device_transitional_reset (obj=0x10165c400) at /home/greg/Work/qemu/qemu-virtiofs/include/hw/qdev-core.h:17
#2 0x0000000100a00e24 in resettable_phase_hold (obj=0x10165c400, opaque=<optimized out>, type=<optimized out>) at ../../hw/core/resettable.c:182
#3 0x00000001009f9108 in bus_reset_child_foreach (obj=<optimized out>, cb=0x100a00cc0 <resettable_phase_hold>, opaque=0x0, type=<optimized out>) at ../../hw/core/bus.c:97
#4 0x0000000100a00db8 in resettable_child_foreach (rc=0x1014f5400, type=RESET_TYPE_COLD, opaque=0x0, cb=0x100a00cc0 <resettable_phase_hold>, obj=0x10156e600) at ../../hw/core/resettable.c:96
#5 0x0000000100a00db8 in resettable_phase_hold (obj=0x10156e600, opaque=<optimized out>, type=<optimized out>) at ../../hw/core/resettable.c:173
#6 0x00000001009fcaa8 in device_reset_child_foreach (obj=<optimized out>, cb=0x100a00cc0 <resettable_phase_hold>, opaque=0x0, type=<optimized out>) at ../../hw/core/qdev.c:366
#7 0x0000000100a00db8 in resettable_child_foreach (rc=0x1013eef90, type=RESET_TYPE_COLD, opaque=0x0, cb=0x100a00cc0 <resettable_phase_hold>, obj=0x10164a0e0) at ../../hw/core/resettable.c:96
#8 0x0000000100a00db8 in resettable_phase_hold (obj=0x10164a0e0, opaque=<optimized out>, type=<optimized out>) at ../../hw/core/resettable.c:173
#9 0x00000001009f9108 in bus_reset_child_foreach (obj=<optimized out>, cb=0x100a00cc0 <resettable_phase_hold>, opaque=0x0, type=<optimized out>) at ../../hw/core/bus.c:97
#10 0x0000000100a00db8 in resettable_child_foreach (rc=0x1012b1a00, type=RESET_TYPE_COLD, opaque=0x0, cb=0x100a00cc0 <resettable_phase_hold>, obj=0x10154d4b0) at ../../hw/core/resettable.c:96
#11 0x0000000100a00db8 in resettable_phase_hold (obj=obj@entry=0x10154d4b0, opaque=opaque@entry=0x0, type=type@entry=RESET_TYPE_COLD) at ../../hw/core/resettable.c:173
#12 0x0000000100a01794 in resettable_assert_reset (obj=0x10154d4b0, type=<optimized out>) at ../../hw/core/resettable.c:60
#13 0x0000000100a01c60 in resettable_reset (obj=0x10154d4b0, type=<optimized out>) at ../../hw/core/resettable.c:45
#14 0x0000000100a020ec in resettable_cold_reset_fn (opaque=<optimized out>) at ../../hw/core/resettable.c:269
#15 0x0000000100a00718 in qemu_devices_reset () at ../../hw/core/reset.c:69
#16 0x0000000100624024 in spapr_machine_reset (machine=0x101545480) at ../../hw/ppc/spapr.c:1587
#17 0x00000001007b8128 in qemu_system_reset (reason=<optimized out>) at ../../softmmu/runstate.c:442
#18 0x00000001007b8fa8 in main_loop_should_exit () at ../../softmmu/runstate.c:687
#19 0x00000001007b8fa8 in qemu_main_loop () at ../../softmmu/runstate.c:721
#20 0x00000001002f5150 in main (argc=<optimized out>, argv=<optimized out>, envp=<optimized out>) at ../../softmmu/main.c:50
And it seems rtas_quiesce() could just do bus_cold_reset(&bus->bus)
rather than open-coding the walk of vio_bus children.
next prev parent reply other threads:[~2021-04-27 10:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-24 16:22 [PATCH 0/5] hw: Fix reset of bus-less devices Philippe Mathieu-Daudé
2021-04-24 16:22 ` [PATCH 1/5] hw/ppc/spapr_iommu: Register machine reset handler Philippe Mathieu-Daudé
2021-04-27 1:45 ` David Gibson
2021-04-27 9:20 ` Philippe Mathieu-Daudé
2021-04-27 10:27 ` Greg Kurz [this message]
2021-04-28 1:59 ` David Gibson
2021-04-24 16:22 ` [PATCH 2/5] hw/pcmcia/microdrive: " Philippe Mathieu-Daudé
2021-04-25 18:36 ` Peter Maydell
2021-04-26 15:17 ` Philippe Mathieu-Daudé
2021-04-24 16:22 ` [PATCH 3/5] hw/block/nand: " Philippe Mathieu-Daudé
2021-04-24 16:22 ` [PATCH 4/5] hw/pci-host/raven: Manually reset the OR_IRQ device Philippe Mathieu-Daudé
2021-04-27 1:47 ` David Gibson
2021-04-24 16:22 ` [PATCH 5/5] hw/arm/armsse: Manually reset the OR_IRQ devices Philippe Mathieu-Daudé
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