From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH v6 12/82] target/arm: Implement SVE2 integer add/subtract wide
Date: Fri, 30 Apr 2021 13:25:00 -0700 [thread overview]
Message-ID: <20210430202610.1136687-13-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210430202610.1136687-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v2: Fix select offsets (laurent desnogues).
---
target/arm/helper-sve.h | 16 ++++++++++++++++
target/arm/sve.decode | 12 ++++++++++++
target/arm/sve_helper.c | 30 ++++++++++++++++++++++++++++++
target/arm/translate-sve.c | 20 ++++++++++++++++++++
4 files changed, 78 insertions(+)
diff --git a/target/arm/helper-sve.h b/target/arm/helper-sve.h
index a81297b387..3286a9c205 100644
--- a/target/arm/helper-sve.h
+++ b/target/arm/helper-sve.h
@@ -1391,6 +1391,22 @@ DEF_HELPER_FLAGS_4(sve2_uabdl_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(sve2_uabdl_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(sve2_uabdl_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_saddw_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_saddw_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_saddw_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_4(sve2_ssubw_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_ssubw_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_ssubw_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_4(sve2_uaddw_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_uaddw_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_uaddw_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_4(sve2_usubw_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_usubw_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve2_usubw_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
DEF_HELPER_FLAGS_4(sve_ld1bb_r, TCG_CALL_NO_WG, void, env, ptr, tl, i32)
DEF_HELPER_FLAGS_4(sve_ld2bb_r, TCG_CALL_NO_WG, void, env, ptr, tl, i32)
DEF_HELPER_FLAGS_4(sve_ld3bb_r, TCG_CALL_NO_WG, void, env, ptr, tl, i32)
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index 12be0584a8..f6f21426ef 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -1184,3 +1184,15 @@ UABDLT 01000101 .. 0 ..... 00 1111 ..... ..... @rd_rn_rm
SADDLBT 01000101 .. 0 ..... 1000 00 ..... ..... @rd_rn_rm
SSUBLBT 01000101 .. 0 ..... 1000 10 ..... ..... @rd_rn_rm
SSUBLTB 01000101 .. 0 ..... 1000 11 ..... ..... @rd_rn_rm
+
+## SVE2 integer add/subtract wide
+
+SADDWB 01000101 .. 0 ..... 010 000 ..... ..... @rd_rn_rm
+SADDWT 01000101 .. 0 ..... 010 001 ..... ..... @rd_rn_rm
+UADDWB 01000101 .. 0 ..... 010 010 ..... ..... @rd_rn_rm
+UADDWT 01000101 .. 0 ..... 010 011 ..... ..... @rd_rn_rm
+
+SSUBWB 01000101 .. 0 ..... 010 100 ..... ..... @rd_rn_rm
+SSUBWT 01000101 .. 0 ..... 010 101 ..... ..... @rd_rn_rm
+USUBWB 01000101 .. 0 ..... 010 110 ..... ..... @rd_rn_rm
+USUBWT 01000101 .. 0 ..... 010 111 ..... ..... @rd_rn_rm
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index 3d0ee76411..cf0dbb3987 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -1156,6 +1156,36 @@ DO_ZZZ_TB(sve2_uabdl_d, uint64_t, uint32_t, , H1_4, DO_ABD)
#undef DO_ZZZ_TB
+#define DO_ZZZ_WTB(NAME, TYPEW, TYPEN, HW, HN, OP) \
+void HELPER(NAME)(void *vd, void *vn, void *vm, uint32_t desc) \
+{ \
+ intptr_t i, opr_sz = simd_oprsz(desc); \
+ int sel2 = extract32(desc, SIMD_DATA_SHIFT, 1) * sizeof(TYPEN); \
+ for (i = 0; i < opr_sz; i += sizeof(TYPEW)) { \
+ TYPEW nn = *(TYPEW *)(vn + HW(i)); \
+ TYPEW mm = *(TYPEN *)(vm + HN(i + sel2)); \
+ *(TYPEW *)(vd + HW(i)) = OP(nn, mm); \
+ } \
+}
+
+DO_ZZZ_WTB(sve2_saddw_h, int16_t, int8_t, H1_2, H1, DO_ADD)
+DO_ZZZ_WTB(sve2_saddw_s, int32_t, int16_t, H1_4, H1_2, DO_ADD)
+DO_ZZZ_WTB(sve2_saddw_d, int64_t, int32_t, , H1_4, DO_ADD)
+
+DO_ZZZ_WTB(sve2_ssubw_h, int16_t, int8_t, H1_2, H1, DO_SUB)
+DO_ZZZ_WTB(sve2_ssubw_s, int32_t, int16_t, H1_4, H1_2, DO_SUB)
+DO_ZZZ_WTB(sve2_ssubw_d, int64_t, int32_t, , H1_4, DO_SUB)
+
+DO_ZZZ_WTB(sve2_uaddw_h, uint16_t, uint8_t, H1_2, H1, DO_ADD)
+DO_ZZZ_WTB(sve2_uaddw_s, uint32_t, uint16_t, H1_4, H1_2, DO_ADD)
+DO_ZZZ_WTB(sve2_uaddw_d, uint64_t, uint32_t, , H1_4, DO_ADD)
+
+DO_ZZZ_WTB(sve2_usubw_h, uint16_t, uint8_t, H1_2, H1, DO_SUB)
+DO_ZZZ_WTB(sve2_usubw_s, uint32_t, uint16_t, H1_4, H1_2, DO_SUB)
+DO_ZZZ_WTB(sve2_usubw_d, uint64_t, uint32_t, , H1_4, DO_SUB)
+
+#undef DO_ZZZ_WTB
+
/* Two-operand reduction expander, controlled by a predicate.
* The difference between TYPERED and TYPERET has to do with
* sign-extension. E.g. for SMAX, TYPERED must be signed,
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index ae8323adb7..70900c122f 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -6020,3 +6020,23 @@ DO_SVE2_ZZZ_TB(UABDLT, uabdl, true, true)
DO_SVE2_ZZZ_TB(SADDLBT, saddl, false, true)
DO_SVE2_ZZZ_TB(SSUBLBT, ssubl, false, true)
DO_SVE2_ZZZ_TB(SSUBLTB, ssubl, true, false)
+
+#define DO_SVE2_ZZZ_WTB(NAME, name, SEL2) \
+static bool trans_##NAME(DisasContext *s, arg_rrr_esz *a) \
+{ \
+ static gen_helper_gvec_3 * const fns[4] = { \
+ NULL, gen_helper_sve2_##name##_h, \
+ gen_helper_sve2_##name##_s, gen_helper_sve2_##name##_d, \
+ }; \
+ return do_sve2_zzw_ool(s, a, fns[a->esz], SEL2); \
+}
+
+DO_SVE2_ZZZ_WTB(SADDWB, saddw, false)
+DO_SVE2_ZZZ_WTB(SADDWT, saddw, true)
+DO_SVE2_ZZZ_WTB(SSUBWB, ssubw, false)
+DO_SVE2_ZZZ_WTB(SSUBWT, ssubw, true)
+
+DO_SVE2_ZZZ_WTB(UADDWB, uaddw, false)
+DO_SVE2_ZZZ_WTB(UADDWT, uaddw, true)
+DO_SVE2_ZZZ_WTB(USUBWB, usubw, false)
+DO_SVE2_ZZZ_WTB(USUBWT, usubw, true)
--
2.25.1
next prev parent reply other threads:[~2021-04-30 20:38 UTC|newest]
Thread overview: 184+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-30 20:24 [PATCH v6 00/82] target/arm: Implement SVE2 Richard Henderson
2021-04-30 20:24 ` [PATCH v6 01/82] target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2 Richard Henderson
2021-05-11 7:55 ` Peter Maydell
2021-05-11 17:20 ` Richard Henderson
2021-04-30 20:24 ` [PATCH v6 02/82] target/arm: Implement SVE2 Integer Multiply - Unpredicated Richard Henderson
2021-05-11 8:00 ` Peter Maydell
2021-04-30 20:24 ` [PATCH v6 03/82] target/arm: Implement SVE2 integer pairwise add and accumulate long Richard Henderson
2021-05-11 8:02 ` Peter Maydell
2021-04-30 20:24 ` [PATCH v6 04/82] target/arm: Implement SVE2 integer unary operations (predicated) Richard Henderson
2021-05-11 8:10 ` Peter Maydell
2021-05-11 17:22 ` Richard Henderson
2021-04-30 20:24 ` [PATCH v6 05/82] target/arm: Split out saturating/rounding shifts from neon Richard Henderson
2021-05-11 8:36 ` Peter Maydell
2021-04-30 20:24 ` [PATCH v6 06/82] target/arm: Implement SVE2 saturating/rounding bitwise shift left (predicated) Richard Henderson
2021-05-11 8:43 ` Peter Maydell
2021-05-11 15:40 ` Richard Henderson
2021-05-11 15:56 ` Peter Maydell
2021-04-30 20:24 ` [PATCH v6 07/82] target/arm: Implement SVE2 integer halving add/subtract (predicated) Richard Henderson
2021-05-11 8:45 ` Peter Maydell
2021-04-30 20:24 ` [PATCH v6 08/82] target/arm: Implement SVE2 integer pairwise arithmetic Richard Henderson
2021-05-11 8:58 ` Peter Maydell
2021-04-30 20:24 ` [PATCH v6 09/82] target/arm: Implement SVE2 saturating add/subtract (predicated) Richard Henderson
2021-05-11 9:07 ` Peter Maydell
2021-04-30 20:24 ` [PATCH v6 10/82] target/arm: Implement SVE2 integer add/subtract long Richard Henderson
2021-05-11 9:11 ` Peter Maydell
2021-04-30 20:24 ` [PATCH v6 11/82] target/arm: Implement SVE2 integer add/subtract interleaved long Richard Henderson
2021-05-11 9:12 ` Peter Maydell
2021-04-30 20:25 ` Richard Henderson [this message]
2021-05-11 9:14 ` [PATCH v6 12/82] target/arm: Implement SVE2 integer add/subtract wide Peter Maydell
2021-04-30 20:25 ` [PATCH v6 13/82] target/arm: Implement SVE2 integer multiply long Richard Henderson
2021-05-11 12:21 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 14/82] target/arm: Implement PMULLB and PMULLT Richard Henderson
2021-05-11 12:29 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 15/82] target/arm: Implement SVE2 bitwise shift left long Richard Henderson
2021-05-11 12:40 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 16/82] target/arm: Implement SVE2 bitwise exclusive-or interleaved Richard Henderson
2021-05-11 12:43 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 17/82] target/arm: Implement SVE2 bitwise permute Richard Henderson
2021-05-11 12:58 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 18/82] target/arm: Implement SVE2 complex integer add Richard Henderson
2021-05-11 13:02 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 19/82] target/arm: Implement SVE2 integer absolute difference and accumulate long Richard Henderson
2021-05-11 15:27 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 20/82] target/arm: Implement SVE2 integer add/subtract long with carry Richard Henderson
2021-05-11 15:48 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 21/82] target/arm: Implement SVE2 bitwise shift right and accumulate Richard Henderson
2021-05-11 15:57 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 22/82] target/arm: Implement SVE2 bitwise shift and insert Richard Henderson
2021-05-11 15:58 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 23/82] target/arm: Implement SVE2 integer absolute difference and accumulate Richard Henderson
2021-05-11 15:59 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 24/82] target/arm: Implement SVE2 saturating extract narrow Richard Henderson
2021-05-11 16:08 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 25/82] target/arm: Implement SVE2 floating-point pairwise Richard Henderson
2021-05-11 16:09 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 26/82] target/arm: Implement SVE2 SHRN, RSHRN Richard Henderson
2021-05-12 8:52 ` Peter Maydell
2021-05-12 16:07 ` Richard Henderson
2021-04-30 20:25 ` [PATCH v6 27/82] target/arm: Implement SVE2 SQSHRUN, SQRSHRUN Richard Henderson
2021-05-12 8:54 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 28/82] target/arm: Implement SVE2 UQSHRN, UQRSHRN Richard Henderson
2021-05-12 8:56 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 29/82] target/arm: Implement SVE2 SQSHRN, SQRSHRN Richard Henderson
2021-05-12 8:59 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 30/82] target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHS Richard Henderson
2021-05-12 9:07 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 31/82] target/arm: Implement SVE2 WHILERW, WHILEWR Richard Henderson
2021-05-12 14:06 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 32/82] target/arm: Implement SVE2 bitwise ternary operations Richard Henderson
2021-05-12 14:12 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 33/82] target/arm: Implement SVE2 MATCH, NMATCH Richard Henderson
2021-04-30 20:25 ` [PATCH v6 34/82] target/arm: Implement SVE2 saturating multiply-add long Richard Henderson
2021-05-12 14:21 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 35/82] target/arm: Implement SVE2 saturating multiply-add high Richard Henderson
2021-05-12 15:12 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 36/82] target/arm: Implement SVE2 integer multiply-add long Richard Henderson
2021-05-12 15:13 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 37/82] target/arm: Implement SVE2 complex integer multiply-add Richard Henderson
2021-05-12 15:20 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 38/82] target/arm: Implement SVE2 ADDHNB, ADDHNT Richard Henderson
2021-05-12 15:23 ` Peter Maydell
2021-05-12 16:17 ` Richard Henderson
2021-04-30 20:25 ` [PATCH v6 39/82] target/arm: Implement SVE2 RADDHNB, RADDHNT Richard Henderson
2021-05-12 15:24 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 40/82] target/arm: Implement SVE2 SUBHNB, SUBHNT Richard Henderson
2021-05-12 15:24 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 41/82] target/arm: Implement SVE2 RSUBHNB, RSUBHNT Richard Henderson
2021-05-12 15:25 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 42/82] target/arm: Implement SVE2 HISTCNT, HISTSEG Richard Henderson
2021-05-13 10:22 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 43/82] target/arm: Implement SVE2 XAR Richard Henderson
2021-05-13 10:27 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 44/82] target/arm: Implement SVE2 scatter store insns Richard Henderson
2021-05-13 10:31 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 45/82] target/arm: Implement SVE2 gather load insns Richard Henderson
2021-05-13 10:33 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 46/82] target/arm: Implement SVE2 FMMLA Richard Henderson
2021-05-13 10:38 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 47/82] target/arm: Implement SVE2 SPLICE, EXT Richard Henderson
2021-05-13 10:41 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 48/82] target/arm: Pass separate addend to {U, S}DOT helpers Richard Henderson
2021-05-13 10:47 ` Peter Maydell
2021-05-14 16:33 ` Richard Henderson
2021-05-14 16:35 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 49/82] target/arm: Pass separate addend to FCMLA helpers Richard Henderson
2021-04-30 20:25 ` [PATCH v6 50/82] target/arm: Split out formats for 2 vectors + 1 index Richard Henderson
2021-05-13 10:49 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 51/82] target/arm: Split out formats for 3 " Richard Henderson
2021-05-13 10:53 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 52/82] target/arm: Implement SVE2 integer multiply (indexed) Richard Henderson
2021-05-13 12:31 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 53/82] target/arm: Implement SVE2 integer multiply-add (indexed) Richard Henderson
2021-05-13 12:33 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 54/82] target/arm: Implement SVE2 saturating multiply-add high (indexed) Richard Henderson
2021-05-13 12:35 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 55/82] target/arm: Implement SVE2 saturating multiply-add (indexed) Richard Henderson
2021-05-13 12:42 ` Peter Maydell
2021-05-14 18:17 ` Richard Henderson
2021-04-30 20:25 ` [PATCH v6 56/82] target/arm: Implement SVE2 saturating multiply (indexed) Richard Henderson
2021-05-13 12:45 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 57/82] target/arm: Implement SVE2 signed saturating doubling multiply high Richard Henderson
2021-05-13 12:48 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 58/82] target/arm: Implement SVE2 saturating multiply high (indexed) Richard Henderson
2021-05-13 12:51 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 59/82] target/arm: Implement SVE mixed sign dot product (indexed) Richard Henderson
2021-05-13 12:57 ` Peter Maydell
2021-05-14 18:47 ` Richard Henderson
2021-04-30 20:25 ` [PATCH v6 60/82] target/arm: Implement SVE mixed sign dot product Richard Henderson
2021-05-13 13:01 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 61/82] target/arm: Implement SVE2 crypto unary operations Richard Henderson
2021-05-13 13:02 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 62/82] target/arm: Implement SVE2 crypto destructive binary operations Richard Henderson
2021-05-13 13:04 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 63/82] target/arm: Implement SVE2 crypto constructive " Richard Henderson
2021-05-13 13:52 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 64/82] target/arm: Implement SVE2 TBL, TBX Richard Henderson
2021-05-13 13:59 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 65/82] target/arm: Implement SVE2 FCVTNT Richard Henderson
2021-05-13 14:01 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 66/82] target/arm: Implement SVE2 FCVTLT Richard Henderson
2021-05-13 14:03 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 67/82] target/arm: Implement SVE2 FCVTXNT, FCVTX Richard Henderson
2021-05-13 14:06 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 68/82] target/arm: Implement SVE2 FLOGB Richard Henderson
2021-05-13 14:18 ` Peter Maydell
2021-05-15 16:14 ` Richard Henderson
2021-04-30 20:25 ` [PATCH v6 69/82] target/arm: Share table of sve load functions Richard Henderson
2021-05-13 14:25 ` Peter Maydell
2021-05-15 16:25 ` Richard Henderson
2021-04-30 20:25 ` [PATCH v6 70/82] target/arm: Implement SVE2 LD1RO Richard Henderson
2021-05-13 16:41 ` Peter Maydell
2021-04-30 20:25 ` [PATCH v6 71/82] target/arm: Implement 128-bit ZIP, UZP, TRN Richard Henderson
2021-05-13 16:48 ` Peter Maydell
2021-04-30 20:26 ` [PATCH v6 72/82] target/arm: Implement SVE2 bitwise shift immediate Richard Henderson
2021-05-13 16:57 ` Peter Maydell
2021-05-15 16:53 ` Richard Henderson
2021-04-30 20:26 ` [PATCH v6 73/82] target/arm: Implement SVE2 fp multiply-add long Richard Henderson
2021-05-13 17:04 ` Peter Maydell
2021-05-15 17:09 ` Richard Henderson
2021-04-30 20:26 ` [PATCH v6 74/82] target/arm: Implement aarch64 SUDOT, USDOT Richard Henderson
2021-05-13 17:09 ` Peter Maydell
2021-04-30 20:26 ` [PATCH v6 75/82] target/arm: Split out do_neon_ddda_fpst Richard Henderson
2021-05-13 17:13 ` Peter Maydell
2021-04-30 20:26 ` [PATCH v6 76/82] target/arm: Remove unused fpst from VDOT_scalar Richard Henderson
2021-05-13 17:18 ` Peter Maydell
2021-04-30 20:26 ` [PATCH v6 77/82] target/arm: Fix decode for VDOT (indexed) Richard Henderson
2021-05-13 19:25 ` Peter Maydell
2021-05-15 17:13 ` Richard Henderson
2021-05-16 16:09 ` Peter Maydell
2021-05-17 15:48 ` Richard Henderson
2021-05-15 17:20 ` Richard Henderson
2021-04-30 20:26 ` [PATCH v6 78/82] target/arm: Split decode of VSDOT and VUDOT Richard Henderson
2021-05-13 19:27 ` Peter Maydell
2021-04-30 20:26 ` [PATCH v6 79/82] target/arm: Implement aarch32 VSUDOT, VUSDOT Richard Henderson
2021-05-13 19:32 ` Peter Maydell
2021-04-30 20:26 ` [PATCH v6 80/82] target/arm: Implement integer matrix multiply accumulate Richard Henderson
2021-05-13 19:49 ` Peter Maydell
2021-05-14 16:58 ` Richard Henderson
2021-04-30 20:26 ` [PATCH v6 81/82] linux-user/aarch64: Enable hwcap bits for sve2 and related extensions Richard Henderson
2021-05-13 19:33 ` Peter Maydell
2021-04-30 20:26 ` [PATCH v6 82/82] target/arm: Enable SVE2 " Richard Henderson
2021-05-13 19:35 ` Peter Maydell
2021-05-14 17:21 ` Richard Henderson
2021-05-13 19:49 ` [PATCH v6 00/82] target/arm: Implement SVE2 Peter Maydell
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