From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Taylor Simpson" <tsimpson@quicinc.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 04/31] target/hexagon: fix typo in comment
Date: Sat, 1 May 2021 11:42:57 -0700 [thread overview]
Message-ID: <20210501184324.1338186-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210501184324.1338186-1-richard.henderson@linaro.org>
From: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <1615784115-26559-1-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hexagon/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 2c6d718579..d6b5c47500 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -298,7 +298,7 @@ int32_t HELPER(fcircadd)(int32_t RxV, int32_t offset, int32_t M, int32_t CS)
}
/*
- * Hexagon FP operations return ~0 insteat of NaN
+ * Hexagon FP operations return ~0 instead of NaN
* The hex_check_sfnan/hex_check_dfnan functions perform this check
*/
static float32 hex_check_sfnan(float32 x)
--
2.25.1
next prev parent reply other threads:[~2021-05-01 18:53 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-01 18:42 [PULL 00/31] target/hexagon patch queue Richard Henderson
2021-05-01 18:42 ` [PULL 01/31] target/hexagon: translation changes Richard Henderson
2021-05-01 18:42 ` [PULL 02/31] target/hexagon: remove unnecessary checks in find_iclass_slots Richard Henderson
2021-05-01 18:42 ` [PULL 03/31] target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUM Richard Henderson
2021-05-01 18:42 ` Richard Henderson [this message]
2021-05-01 18:42 ` [PULL 05/31] target/hexagon: remove unnecessary semicolons Richard Henderson
2021-05-01 18:42 ` [PULL 06/31] Hexagon (target/hexagon) TCG generation cleanup Richard Henderson
2021-05-01 18:43 ` [PULL 07/31] Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair Richard Henderson
2021-05-01 18:43 ` [PULL 08/31] Hexagon (target/hexagon) remove unnecessary inline directives Richard Henderson
2021-05-01 18:43 ` [PULL 09/31] Hexagon (target/hexagon) use env_archcpu and env_cpu Richard Henderson
2021-05-01 18:43 ` [PULL 10/31] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN Richard Henderson
2021-05-01 18:43 ` [PULL 11/31] Hexagon (target/hexagon) decide if pred has been written at TCG gen time Richard Henderson
2021-05-01 18:43 ` [PULL 12/31] Hexagon (target/hexagon) change variables from int to bool when appropriate Richard Henderson
2021-05-01 18:43 ` [PULL 13/31] Hexagon (target/hexagon) remove unused carry_from_add64 function Richard Henderson
2021-05-01 18:43 ` [PULL 14/31] Hexagon (target/hexagon) change type of softfloat_roundingmodes Richard Henderson
2021-05-01 18:43 ` [PULL 15/31] Hexagon (target/hexagon) use softfloat default NaN and tininess Richard Henderson
2021-05-01 18:43 ` [PULL 16/31] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn Richard Henderson
2021-05-01 18:43 ` [PULL 17/31] Hexagon (target/hexagon) use softfloat for float-to-int conversions Richard Henderson
2021-05-01 18:43 ` [PULL 18/31] Hexagon (target/hexagon) cleanup ternary operators in semantics Richard Henderson
2021-05-01 18:43 ` [PULL 19/31] Hexagon (target/hexagon) cleanup reg_field_info definition Richard Henderson
2021-05-01 18:43 ` [PULL 20/31] Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h Richard Henderson
2021-05-01 18:43 ` [PULL 21/31] Hexagon (target/hexagon) compile all debug code Richard Henderson
2021-05-01 18:43 ` [PULL 22/31] Hexagon (target/hexagon) add F2_sfrecipa instruction Richard Henderson
2021-05-01 18:43 ` [PULL 23/31] Hexagon (target/hexagon) add F2_sfinvsqrta Richard Henderson
2021-05-01 18:43 ` [PULL 24/31] Hexagon (target/hexagon) add A5_ACS (vacsh) Richard Henderson
2021-05-01 18:43 ` [PULL 25/31] Hexagon (target/hexagon) add A6_vminub_RdP Richard Henderson
2021-05-01 18:43 ` [PULL 26/31] Hexagon (target/hexagon) add A4_addp_c/A4_subp_c Richard Henderson
2021-05-01 18:43 ` [PULL 27/31] Hexagon (target/hexagon) circular addressing Richard Henderson
2021-05-01 18:43 ` [PULL 28/31] Hexagon (target/hexagon) bit reverse (brev) addressing Richard Henderson
2021-05-01 18:43 ` [PULL 29/31] Hexagon (target/hexagon) load and unpack bytes instructions Richard Henderson
2021-05-01 18:43 ` [PULL 30/31] Hexagon (target/hexagon) load into shifted register instructions Richard Henderson
2021-05-01 18:43 ` [PULL 31/31] Hexagon (target/hexagon) CABAC decode bin Richard Henderson
2021-05-01 20:40 ` [PULL 00/31] target/hexagon patch queue Peter Maydell
2021-05-01 22:31 ` Richard Henderson
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