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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id y7sm13767lfy.50.2021.05.03.09.51.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 May 2021 09:51:51 -0700 (PDT) Date: Mon, 3 May 2021 18:51:50 +0200 From: "Edgar E. Iglesias" To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Subject: Re: [PATCH v3 1/2] hw/timer/etraxfs_timer: Convert to 3-phase reset (Resettable interface) Message-ID: <20210503165150.GD477672@toto> References: <20210502163931.552675-1-f4bug@amsat.org> <20210502163931.552675-2-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20210502163931.552675-2-f4bug@amsat.org> Received-SPF: pass client-ip=2a00:1450:4864:20::129; envelope-from=edgar.iglesias@gmail.com; helo=mail-lf1-x129.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Michael S. Tsirkin" , Laurent Vivier , qemu-devel@nongnu.org, Peter Maydell Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Sun, May 02, 2021 at 06:39:30PM +0200, Philippe Mathieu-Daudé wrote: > TYPE_ETRAX_FS_TIMER is a sysbus device, so its DeviceClass::reset() > handler is called automatically when its qbus parent is reset > (we don't need to register it manually). > > Convert the generic reset to a enter/hold resettable ones, and > remove the qemu_register_reset() call. Reviewed-by: Edgar E. Iglesias > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/timer/etraxfs_timer.c | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c > index 5379006086f..4ba662190de 100644 > --- a/hw/timer/etraxfs_timer.c > +++ b/hw/timer/etraxfs_timer.c > @@ -309,9 +309,9 @@ static const MemoryRegionOps timer_ops = { > } > }; > > -static void etraxfs_timer_reset(void *opaque) > +static void etraxfs_timer_reset_enter(Object *obj, ResetType type) > { > - ETRAXTimerState *t = opaque; > + ETRAXTimerState *t = ETRAX_TIMER(obj); > > ptimer_transaction_begin(t->ptimer_t0); > ptimer_stop(t->ptimer_t0); > @@ -325,6 +325,12 @@ static void etraxfs_timer_reset(void *opaque) > t->rw_wd_ctrl = 0; > t->r_intr = 0; > t->rw_intr_mask = 0; > +} > + > +static void etraxfs_timer_reset_hold(Object *obj) > +{ > + ETRAXTimerState *t = ETRAX_TIMER(obj); > + > qemu_irq_lower(t->irq); > } > > @@ -343,14 +349,16 @@ static void etraxfs_timer_realize(DeviceState *dev, Error **errp) > memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t, > "etraxfs-timer", 0x5c); > sysbus_init_mmio(sbd, &t->mmio); > - qemu_register_reset(etraxfs_timer_reset, t); > } > > static void etraxfs_timer_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > + ResettableClass *rc = RESETTABLE_CLASS(klass); > > dc->realize = etraxfs_timer_realize; > + rc->phases.enter = etraxfs_timer_reset_enter; > + rc->phases.hold = etraxfs_timer_reset_hold; > } > > static const TypeInfo etraxfs_timer_info = { > -- > 2.26.3 >