From: frank.chang@sifive.com
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Frank Chang <frank.chang@sifive.com>,
Alistair Francis <alistair.francis@wdc.com>,
Kito Cheng <kito.cheng@sifive.com>,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: [PATCH v6 01/17] target/riscv: reformat @sh format encoding for B-extension
Date: Thu, 6 May 2021 00:06:02 +0800 [thread overview]
Message-ID: <20210505160620.15723-2-frank.chang@sifive.com> (raw)
In-Reply-To: <20210505160620.15723-1-frank.chang@sifive.com>
From: Kito Cheng <kito.cheng@sifive.com>
Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/insn32.decode | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index 8901ba1e1bf..f75642bb0d2 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -23,7 +23,7 @@
%rd 7:5
%sh5 20:5
-%sh10 20:10
+%sh7 20:7
%csr 20:12
%rm 12:3
%nf 29:3 !function=ex_plus_1
@@ -59,7 +59,7 @@
@u .................... ..... ....... &u imm=%imm_u %rd
@j .................... ..... ....... &j imm=%imm_j %rd
-@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd
+@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd
@csr ............ ..... ... ..... ....... %csr %rs1 %rd
@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd
@@ -125,9 +125,9 @@ sltiu ............ ..... 011 ..... 0010011 @i
xori ............ ..... 100 ..... 0010011 @i
ori ............ ..... 110 ..... 0010011 @i
andi ............ ..... 111 ..... 0010011 @i
-slli 00.... ...... ..... 001 ..... 0010011 @sh
-srli 00.... ...... ..... 101 ..... 0010011 @sh
-srai 01.... ...... ..... 101 ..... 0010011 @sh
+slli 00000. ...... ..... 001 ..... 0010011 @sh
+srli 00000. ...... ..... 101 ..... 0010011 @sh
+srai 01000. ...... ..... 101 ..... 0010011 @sh
add 0000000 ..... ..... 000 ..... 0110011 @r
sub 0100000 ..... ..... 000 ..... 0110011 @r
sll 0000000 ..... ..... 001 ..... 0110011 @r
--
2.17.1
next prev parent reply other threads:[~2021-05-05 16:22 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-05 16:06 [PATCH v6 00/17] support subsets of bitmanip extension frank.chang
2021-05-05 16:06 ` frank.chang [this message]
2021-05-05 16:06 ` [PATCH v6 02/17] target/riscv: rvb: count leading/trailing zeros frank.chang
2021-05-06 2:04 ` Alistair Francis
2021-05-05 16:06 ` [PATCH v6 03/17] target/riscv: rvb: count bits set frank.chang
2021-05-05 16:06 ` [PATCH v6 04/17] target/riscv: rvb: logic-with-negate frank.chang
2021-05-05 16:06 ` [PATCH v6 05/17] target/riscv: rvb: pack two words into one register frank.chang
2021-05-05 16:06 ` [PATCH v6 06/17] target/riscv: rvb: min/max instructions frank.chang
2021-05-05 16:06 ` [PATCH v6 07/17] target/riscv: rvb: sign-extend instructions frank.chang
2021-05-05 16:06 ` [PATCH v6 08/17] target/riscv: add gen_shifti() and gen_shiftiw() helper functions frank.chang
2021-05-10 7:23 ` Alistair Francis
2021-05-05 16:06 ` [PATCH v6 09/17] target/riscv: rvb: single-bit instructions frank.chang
2021-05-10 7:24 ` Alistair Francis
2021-05-05 16:06 ` [PATCH v6 10/17] target/riscv: rvb: shift ones frank.chang
2021-05-10 7:26 ` Alistair Francis
2021-05-05 16:06 ` [PATCH v6 11/17] target/riscv: rvb: rotate (left/right) frank.chang
2021-05-20 7:11 ` Alistair Francis
2021-05-05 16:06 ` [PATCH v6 12/17] target/riscv: rvb: generalized reverse frank.chang
2021-05-05 16:06 ` [PATCH v6 13/17] target/riscv: rvb: generalized or-combine frank.chang
2021-05-05 16:06 ` [PATCH v6 14/17] target/riscv: rvb: address calculation frank.chang
2021-05-05 16:06 ` [PATCH v6 15/17] target/riscv: rvb: add/shift with prefix zero-extend frank.chang
2021-05-05 16:06 ` [PATCH v6 16/17] target/riscv: rvb: support and turn on B-extension from command line frank.chang
2021-05-05 16:06 ` [PATCH v6 17/17] target/riscv: rvb: add b-ext version cpu option frank.chang
2021-05-27 22:05 ` Alistair Francis
2021-05-27 22:08 ` [PATCH v6 00/17] support subsets of bitmanip extension Alistair Francis
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