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[81.40.121.39]) by smtp.gmail.com with ESMTPSA id a24sm13380584edr.74.2021.05.10.21.06.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 May 2021 21:06:48 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v2 4/4] hw/isa/piix4: Fix leak removing unuseful qemu_allocate_irqs() call Date: Tue, 11 May 2021 06:06:21 +0200 Message-Id: <20210511040621.2736981-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210511040621.2736981-1-f4bug@amsat.org> References: <20210511040621.2736981-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-x631.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Huacai Chen , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Greg Kurz , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , qemu-ppc@nongnu.org, Aurelien Jarno , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We locally create an input IRQ with qemu_allocate_irqs() to pass it as output IRQ of the PIC, but its handler simply dispatch into another of our output IRQ ("intr" output). Simplify by directly connecting the PIC output to our "intr" output. This fixes when using QEMU built with --enable-sanitizers: ==338425==ERROR: LeakSanitizer: detected memory leaks Direct leak of 8 byte(s) in 1 object(s) allocated from: #0 0x5641b361e1df in malloc (qemu-system-mips+0x1b201df) #1 0x7f995e683958 in g_malloc (/lib64/libglib-2.0.so.0+0x58958) #2 0x5641b5558e36 in qemu_allocate_irqs hw/core/irq.c:66:12 #3 0x5641b4161817 in piix4_realize hw/isa/piix4.c:171:21 #4 0x5641b42f077a in pci_qdev_realize hw/pci/pci.c:2114:9 #5 0x5641b554c802 in device_set_realized hw/core/qdev.c:761:13 #6 0x5641b5578458 in property_set_bool qom/object.c:2257:5 #7 0x5641b55709e2 in object_property_set qom/object.c:1402:5 #8 0x5641b55861c9 in object_property_set_qobject qom/qom-qobject.c:28:10 #9 0x5641b5571831 in object_property_set_bool qom/object.c:1472:15 #10 0x5641b55410fd in qdev_realize hw/core/qdev.c:389:12 Fixes: 078778c5a55 ("piix4: Add an i8259 Interrupt Controller as specified in datasheet") Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/piix4.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 0fe7b69bc4c..a16f7a3ef94 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -115,12 +115,6 @@ static const VMStateDescription vmstate_piix4 = { } }; -static void piix4_request_i8259_irq(void *opaque, int irq, int level) -{ - PIIX4State *s = opaque; - qemu_set_irq(s->cpu_intr, level); -} - static void piix4_set_i8259_irq(void *opaque, int irq, int level) { PIIX4State *s = opaque; @@ -161,7 +155,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp) { PIIX4State *s = PIIX4_PCI_DEVICE(dev); ISABus *isa_bus; - qemu_irq *i8259_out_irq; isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev), pci_address_space_io(dev), errp); @@ -180,8 +173,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) PIIX_RCR_IOPORT, &s->rcr_mem, 1); /* initialize i8259 pic */ - i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1); - s->isa = i8259_init(isa_bus, *i8259_out_irq); + s->isa = i8259_init(isa_bus, s->cpu_intr); /* initialize ISA irqs */ isa_bus_irqs(isa_bus, s->isa); -- 2.26.3