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From: Julia Suvorova <jusual@redhat.com>
To: qemu-devel@nongnu.org
Cc: Igor Mammedov <imammedo@redhat.com>,
	Julia Suvorova <jusual@redhat.com>,
	Eduardo Habkost <ehabkost@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>
Subject: [RFC PATCH v4 4/7] hw/pci/pcie: Do not set HPC flag if acpihp is used
Date: Thu, 13 May 2021 08:26:39 +0200	[thread overview]
Message-ID: <20210513062642.3027987-5-jusual@redhat.com> (raw)
In-Reply-To: <20210513062642.3027987-1-jusual@redhat.com>

Instead of changing the hot-plug type in _OSC register, do not
set the 'Hot-Plug Capable' flag. This way guest will choose ACPI
hot-plug if it is preferred and leave the option to use SHPC with
pcie-pci-bridge.

The ability to control hot-plug for each downstream port is retained,
while 'hotplug=off' on the port means all hot-plug types are disabled.

Signed-off-by: Julia Suvorova <jusual@redhat.com>
---
 include/hw/boards.h |  1 +
 hw/acpi/pcihp.c     |  8 ++++++++
 hw/core/machine.c   | 19 +++++++++++++++++++
 hw/i386/pc_q35.c    |  8 ++++++++
 hw/pci/pcie.c       | 11 ++++++++++-
 5 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/include/hw/boards.h b/include/hw/boards.h
index 3d55d2bd62..a20ca5ab37 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -334,6 +334,7 @@ struct MachineState {
     CpuTopology smp;
     struct NVDIMMState *nvdimms_state;
     struct NumaState *numa_state;
+    bool native_pci_hotplug;
 };
 
 #define DEFINE_MACHINE(namestr, machine_initfn) \
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 5355618608..7a6bc1b31e 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -31,6 +31,7 @@
 #include "hw/pci/pci.h"
 #include "hw/pci/pci_bridge.h"
 #include "hw/pci/pci_host.h"
+#include "hw/pci/pcie_port.h"
 #include "hw/i386/acpi-build.h"
 #include "hw/acpi/acpi.h"
 #include "hw/pci/pci_bus.h"
@@ -332,6 +333,13 @@ void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
             object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
             PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
 
+            /* Remove all hot-plug handlers if hot-plug is disabled on slot */
+            if (object_dynamic_cast(OBJECT(dev), TYPE_PCIE_SLOT) &&
+                !PCIE_SLOT(pdev)->hotplug) {
+                qbus_set_hotplug_handler(BUS(sec), NULL);
+                return;
+            }
+
             qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev));
             /* We don't have to overwrite any other hotplug handler yet */
             assert(QLIST_EMPTY(&sec->child));
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 1bf0e687b9..a3411f0e04 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -581,6 +581,21 @@ static void machine_set_memdev(Object *obj, const char *value, Error **errp)
     ms->ram_memdev_id = g_strdup(value);
 }
 
+static void machine_set_native_pci_hotplug(Object *obj, bool value,
+                                           Error **errp)
+{
+    MachineState *ms = MACHINE(obj);
+
+    ms->native_pci_hotplug = value;
+}
+
+static bool machine_get_native_pci_hotplug(Object *obj, Error **errp)
+{
+    MachineState *ms = MACHINE(obj);
+
+    return ms->native_pci_hotplug;
+}
+
 
 static void machine_init_notify(Notifier *notifier, void *data)
 {
@@ -891,6 +906,10 @@ static void machine_class_init(ObjectClass *oc, void *data)
     object_class_property_set_description(oc, "confidential-guest-support",
                                           "Set confidential guest scheme to support");
 
+    object_class_property_add_bool(oc, "x-native-pci-hotplug",
+                                   machine_get_native_pci_hotplug,
+                                   machine_set_native_pci_hotplug);
+
     /* For compatibility */
     object_class_property_add_str(oc, "memory-encryption",
         machine_get_memory_encryption, machine_set_memory_encryption);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 46a0f196f4..1059ebfdc7 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -136,6 +136,7 @@ static void pc_q35_init(MachineState *machine)
     ram_addr_t lowmem;
     DriveInfo *hd[MAX_SATA_PORTS];
     MachineClass *mc = MACHINE_GET_CLASS(machine);
+    bool acpi_pcihp;
 
     /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
      * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
@@ -236,6 +237,13 @@ static void pc_q35_init(MachineState *machine)
     object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
                              OBJECT(lpc), &error_abort);
 
+    acpi_pcihp = object_property_get_bool(OBJECT(lpc),
+                                          "acpi-pci-hotplug-with-bridge-support",
+                                          NULL);
+
+    object_property_set_bool(OBJECT(machine), "x-native-pci-hotplug",
+                             !acpi_pcihp, NULL);
+
     /* irq lines */
     gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
 
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index fd0fa157e8..be331310c3 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -517,6 +517,9 @@ void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev,
 void pcie_cap_slot_init(PCIDevice *dev, PCIESlot *s)
 {
     uint32_t pos = dev->exp.exp_cap;
+    bool native_pcihp_enabled = object_property_get_bool(qdev_get_machine(),
+                                                         "x-native-pci-hotplug",
+                                                         NULL);
 
     pci_word_test_and_set_mask(dev->config + pos + PCI_EXP_FLAGS,
                                PCI_EXP_FLAGS_SLOT);
@@ -529,7 +532,13 @@ void pcie_cap_slot_init(PCIDevice *dev, PCIESlot *s)
                                PCI_EXP_SLTCAP_PIP |
                                PCI_EXP_SLTCAP_AIP |
                                PCI_EXP_SLTCAP_ABP);
-    if (s->hotplug) {
+
+    /*
+     * Enable native hot-plug on all hot-plugged bridges unless
+     * hot-plug is disabled on the slot.
+     */
+    if (s->hotplug &&
+        (native_pcihp_enabled || DEVICE(dev)->hotplugged)) {
         pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP,
                                    PCI_EXP_SLTCAP_HPS |
                                    PCI_EXP_SLTCAP_HPC);
-- 
2.30.2



  parent reply	other threads:[~2021-05-13  6:33 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-13  6:26 [RFC PATCH v4 0/7] Use ACPI PCI hot-plug for Q35 Julia Suvorova
2021-05-13  6:26 ` [RFC PATCH v4 1/7] hw/acpi/pcihp: Enhance acpi_pcihp_disable_root_bus() to support Q35 Julia Suvorova
2021-05-13  6:26 ` [RFC PATCH v4 2/7] hw/i386/acpi-build: Add ACPI PCI hot-plug methods to Q35 Julia Suvorova
2021-05-13  6:26 ` [RFC PATCH v4 3/7] hw/acpi/ich9: Enable ACPI PCI hot-plug Julia Suvorova
2021-05-20 13:46   ` Igor Mammedov
2021-05-13  6:26 ` Julia Suvorova [this message]
2021-05-20 14:14   ` [RFC PATCH v4 4/7] hw/pci/pcie: Do not set HPC flag if acpihp is used Igor Mammedov
2021-05-13  6:26 ` [RFC PATCH v4 5/7] bios-tables-test: Allow changes in DSDT ACPI tables Julia Suvorova
2021-05-20 14:14   ` Igor Mammedov
2021-05-13  6:26 ` [RFC PATCH v4 6/7] hw/acpi/ich9: Set ACPI PCI hot-plug as default on Q35 Julia Suvorova
2021-05-20 14:23   ` Igor Mammedov
2021-05-13  6:26 ` [RFC PATCH v4 7/7] bios-tables-test: Update golden binaries Julia Suvorova
2021-05-20 14:37 ` [RFC PATCH v4 0/7] Use ACPI PCI hot-plug for Q35 Igor Mammedov
2021-05-23  8:25 ` Michael S. Tsirkin
2021-06-16 17:26   ` Julia Suvorova
2021-05-26  5:39 ` Michael S. Tsirkin

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