From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Laurent Vivier" <laurent@vivier.eu>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [PATCH v7 01/23] NOTFORMERGE target/arm: Restrict MTE code to softmmu
Date: Mon, 17 May 2021 12:51:18 +0200 [thread overview]
Message-ID: <20210517105140.1062037-2-f4bug@amsat.org> (raw)
In-Reply-To: <20210517105140.1062037-1-f4bug@amsat.org>
The following patches require the "arm cleanup experiment for
kvm-only build" [*] series with split various user/sysemu and
tcg/kvm code from the target/arm/ directory.
To be able to build the following patches waiting the series
get merged, simply restrict the MTE code to the softmmu source
set.
[*] https://lists.gnu.org/archive/html/qemu-devel/2021-04/msg02908.html
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/arm/meson.build | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 5bfaf43b500..09802ba1a17 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -41,7 +41,6 @@
'cpu64.c',
'gdbstub64.c',
'helper-a64.c',
- 'mte_helper.c',
'pauth_helper.c',
'sve_helper.c',
'translate-a64.c',
@@ -49,6 +48,11 @@
))
arm_softmmu_ss = ss.source_set()
+
+arm_softmmu_ss.add(when: 'TARGET_AARCH64', if_true: files(
+ 'mte_helper.c',
+))
+
arm_softmmu_ss.add(files(
'arch_dump.c',
'arm-powerctl.c',
--
2.26.3
next prev parent reply other threads:[~2021-05-17 10:55 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-17 10:51 [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-05-17 10:51 ` Philippe Mathieu-Daudé [this message]
2021-05-17 10:51 ` [PATCH v7 02/23] cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu Philippe Mathieu-Daudé
2021-05-26 2:12 ` Richard Henderson
2021-05-26 17:22 ` Philippe Mathieu-Daudé
2021-05-26 17:47 ` Richard Henderson
2021-05-17 10:51 ` [PATCH v7 03/23] cpu: Restrict target cpu_do_unaligned_access() " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 04/23] cpu: Remove duplicated 'sysemu/hw_accel.h' header Philippe Mathieu-Daudé
2021-05-26 2:13 ` Richard Henderson
2021-05-17 10:51 ` [PATCH v7 05/23] cpu: Split as cpu-common / cpu-sysemu Philippe Mathieu-Daudé
2021-05-26 2:16 ` Richard Henderson
2021-05-17 10:51 ` [PATCH v7 06/23] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 07/23] cpu: Introduce cpu_virtio_is_big_endian() Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 08/23] cpu: Directly use cpu_write_elf*() fallback handlers in place Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 09/23] cpu: Directly use get_paging_enabled() " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 10/23] cpu: Directly use get_memory_mapping() " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 11/23] cpu: Assert DeviceClass::vmsd is NULL on user emulation Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 12/23] cpu: Rename CPUClass vmsd -> legacy_vmsd Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 13/23] cpu: Move AVR target vmsd field from CPUClass to DeviceClass Philippe Mathieu-Daudé
2021-05-26 2:19 ` Richard Henderson
2021-05-17 10:51 ` [PATCH v7 14/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 15/23] cpu: Move CPUClass::vmsd to SysemuCPUOps Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 16/23] cpu: Move CPUClass::virtio_is_big_endian " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 17/23] cpu: Move CPUClass::get_crash_info " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 18/23] cpu: Move CPUClass::write_elf* " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 19/23] cpu: Move CPUClass::asidx_from_attrs " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 20/23] cpu: Move CPUClass::get_phys_page_debug " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 21/23] cpu: Move CPUClass::get_memory_mapping " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 22/23] cpu: Move CPUClass::get_paging_enabled " Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 23/23] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c Philippe Mathieu-Daudé
2021-05-25 14:12 ` [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-05-26 17:42 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210517105140.1062037-2-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=laurent@vivier.eu \
--cc=pbonzini@redhat.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=qemu-s390x@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).