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From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Thomas Huth" <thuth@redhat.com>,
	"David Hildenbrand" <david@redhat.com>,
	"Cornelia Huck" <cohuck@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Halil Pasic" <pasic@linux.ibm.com>,
	"Christian Borntraeger" <borntraeger@de.ibm.com>,
	qemu-s390x@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v2 08/26] s390x/tcg: Simplify vfll32() handling
Date: Mon, 17 May 2021 16:27:21 +0200	[thread overview]
Message-ID: <20210517142739.38597-9-david@redhat.com> (raw)
In-Reply-To: <20210517142739.38597-1-david@redhat.com>

Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/helper.h           |  1 -
 target/s390x/translate_vx.c.inc |  6 +-----
 target/s390x/vec_fpu_helper.c   | 21 +++++----------------
 3 files changed, 6 insertions(+), 22 deletions(-)

diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 3c87593553..63039c8d73 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -262,7 +262,6 @@ DEF_HELPER_FLAGS_4(gvec_vclgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_5(gvec_vfd64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vfi64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
-DEF_HELPER_FLAGS_4(gvec_vfll32s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vflr64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc
index 4b5bf0a7e3..5ff59984b5 100644
--- a/target/s390x/translate_vx.c.inc
+++ b/target/s390x/translate_vx.c.inc
@@ -2570,18 +2570,14 @@ static DisasJumpType op_vfll(DisasContext *s, DisasOps *o)
 {
     const uint8_t fpf = get_field(s, m3);
     const uint8_t m4 = get_field(s, m4);
-    gen_helper_gvec_2_ptr *fn = gen_helper_gvec_vfll32;
 
     if (fpf != FPF_SHORT || extract32(m4, 0, 3)) {
         gen_program_exception(s, PGM_SPECIFICATION);
         return DISAS_NORETURN;
     }
 
-    if (extract32(m4, 3, 1)) {
-        fn = gen_helper_gvec_vfll32s;
-    }
     gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env,
-                   0, fn);
+                   m4, gen_helper_gvec_vfll32);
     return DISAS_NEXT;
 }
 
diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
index 29a6d52827..5c063a681a 100644
--- a/target/s390x/vec_fpu_helper.c
+++ b/target/s390x/vec_fpu_helper.c
@@ -289,9 +289,10 @@ DEF_GVEC_VFC(vfce, eq)
 DEF_GVEC_VFC(vfch, lt)
 DEF_GVEC_VFC(vfche, le)
 
-static void vfll32(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
-                   bool s, uintptr_t retaddr)
+void HELPER(gvec_vfll32)(void *v1, const void *v2, CPUS390XState *env,
+                         uint32_t desc)
 {
+    const bool s = extract32(simd_data(desc), 3, 1);
     uint8_t vxc, vec_exc = 0;
     S390Vector tmp = {};
     int i;
@@ -308,20 +309,8 @@ static void vfll32(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
             break;
         }
     }
-    handle_ieee_exc(env, vxc, vec_exc, retaddr);
-    *v1 = tmp;
-}
-
-void HELPER(gvec_vfll32)(void *v1, const void *v2, CPUS390XState *env,
-                         uint32_t desc)
-{
-    vfll32(v1, v2, env, false, GETPC());
-}
-
-void HELPER(gvec_vfll32s)(void *v1, const void *v2, CPUS390XState *env,
-                          uint32_t desc)
-{
-    vfll32(v1, v2, env, true, GETPC());
+    handle_ieee_exc(env, vxc, vec_exc, GETPC());
+    *(S390Vector *)v1 = tmp;
 }
 
 static void vflr64(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
-- 
2.31.1



  parent reply	other threads:[~2021-05-17 14:37 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 14:27 [PATCH v2 00/26] s390x/tcg: Implement Vector enhancements facility and switch to z14 David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 01/26] s390x/tcg: Fix FP CONVERT TO (LOGICAL) FIXED NaN handling David Hildenbrand
2021-06-01 21:27   ` Richard Henderson
2021-06-02  9:50     ` David Hildenbrand
2021-06-07  8:04       ` David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 02/26] s390x/tcg: Fix instruction name for VECTOR FP LOAD (LENGTHENED|ROUNDED) David Hildenbrand
2021-06-01 21:27   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 03/26] s390x/tcg: Simplify vop64_3() handling David Hildenbrand
2021-06-03 17:10   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 04/26] s390x/tcg: Simplify vop64_2() handling David Hildenbrand
2021-06-03 17:16   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 05/26] s390x/tcg: Simplify vfc64() handling David Hildenbrand
2021-06-03 17:18   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 06/26] s390x/tcg: Simplify vftci64() handling David Hildenbrand
2021-06-03 17:21   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 07/26] s390x/tcg: Simplify vfma64() handling David Hildenbrand
2021-06-03 17:22   ` Richard Henderson
2021-05-17 14:27 ` David Hildenbrand [this message]
2021-06-03 17:23   ` [PATCH v2 08/26] s390x/tcg: Simplify vfll32() handling Richard Henderson
2021-05-17 14:27 ` [PATCH v2 09/26] s390x/tcg: Simplify vflr64() handling David Hildenbrand
2021-06-03 17:25   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 10/26] s390x/tcg: Simplify wfc64() handling David Hildenbrand
2021-06-03 17:27   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 11/26] s390x/tcg: Implement VECTOR BIT PERMUTE David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 12/26] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 13/26] s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT) David Hildenbrand
2021-06-03 17:32   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 14/26] s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT) David Hildenbrand
2021-06-03 17:33   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 15/26] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE * David Hildenbrand
2021-06-03 17:37   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 16/26] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR David Hildenbrand
2021-06-03 17:40   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 17/26] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 18/26] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 19/26] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 20/26] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE David Hildenbrand
2021-06-03 17:43   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 21/26] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) David Hildenbrand
2021-06-03 17:44   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 22/26] s390x/tcg: Implement VECTOR FP NEGATIVE " David Hildenbrand
2021-06-03 17:45   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 23/26] softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag) David Hildenbrand
2021-06-03 17:01   ` Richard Henderson
2021-05-17 14:27 ` [PATCH v2 24/26] s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) David Hildenbrand
2021-06-03 18:13   ` Richard Henderson
2021-06-07  9:06     ` David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 25/26] s390x/tcg: We support Vector enhancements facility David Hildenbrand
2021-06-07  7:47   ` David Hildenbrand
2021-05-17 14:27 ` [PATCH v2 26/26] s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 David Hildenbrand

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