From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Peter Xu" <peterx@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Bibo Mao" <maobibo@loongson.cn>
Subject: [RFC PATCH 01/25] exec/memory_ldst_cached: Sort declarations
Date: Tue, 18 May 2021 20:36:31 +0200 [thread overview]
Message-ID: <20210518183655.1711377-2-philmd@redhat.com> (raw)
In-Reply-To: <20210518183655.1711377-1-philmd@redhat.com>
To ease the file review, sort the declarations by the size of
the access (8, 16, 32). Simple code movement, no logical change.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/exec/memory_ldst_cached.h.inc | 46 +++++++++++++--------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/include/exec/memory_ldst_cached.h.inc b/include/exec/memory_ldst_cached.h.inc
index 7bc8790d346..c33449d0cd5 100644
--- a/include/exec/memory_ldst_cached.h.inc
+++ b/include/exec/memory_ldst_cached.h.inc
@@ -24,6 +24,18 @@
#define LD_P(size) \
glue(glue(ld, size), glue(ENDIANNESS, _p))
+static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
+ hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
+{
+ assert(addr < cache->len && 2 <= cache->len - addr);
+ fuzz_dma_read_cb(cache->xlat + addr, 2, cache->mrs.mr);
+ if (likely(cache->ptr)) {
+ return LD_P(uw)(cache->ptr + addr);
+ } else {
+ return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result);
+ }
+}
+
static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
@@ -48,18 +60,6 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
}
}
-static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
- hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
-{
- assert(addr < cache->len && 2 <= cache->len - addr);
- fuzz_dma_read_cb(cache->xlat + addr, 2, cache->mrs.mr);
- if (likely(cache->ptr)) {
- return LD_P(uw)(cache->ptr + addr);
- } else {
- return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result);
- }
-}
-
#undef ADDRESS_SPACE_LD_CACHED
#undef ADDRESS_SPACE_LD_CACHED_SLOW
#undef LD_P
@@ -71,17 +71,6 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
#define ST_P(size) \
glue(glue(st, size), glue(ENDIANNESS, _p))
-static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
- hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
-{
- assert(addr < cache->len && 4 <= cache->len - addr);
- if (likely(cache->ptr)) {
- ST_P(l)(cache->ptr + addr, val);
- } else {
- ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result);
- }
-}
-
static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
{
@@ -93,6 +82,17 @@ static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
}
}
+static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
+ hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
+{
+ assert(addr < cache->len && 4 <= cache->len - addr);
+ if (likely(cache->ptr)) {
+ ST_P(l)(cache->ptr + addr, val);
+ } else {
+ ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result);
+ }
+}
+
static inline void ADDRESS_SPACE_ST_CACHED(q)(MemoryRegionCache *cache,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
{
--
2.26.3
next prev parent reply other threads:[~2021-05-18 18:40 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-18 18:36 [RFC PATCH 00/25] exec: Add load/store API for aligned pointers Philippe Mathieu-Daudé
2021-05-18 18:36 ` Philippe Mathieu-Daudé [this message]
2021-05-18 18:36 ` [RFC PATCH 02/25] exec/memory_ldst_phys: Sort declarations Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 03/25] exec/memory_ldst: Use correct type sizes Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 04/25] exec/memory_ldst_phys: " Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 05/25] exec/memory_ldst_cached: Use correct type size Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 06/25] exec/memory: " Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 07/25] qemu/bswap: Introduce ST_CONVERT() macro Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 08/25] qemu/bswap: Use ST_CONVERT() macro to emit 16-bit load/store functions Philippe Mathieu-Daudé
2021-05-18 20:08 ` Peter Maydell
2021-05-19 17:30 ` Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 09/25] qemu/bswap: Introduce LD_CONVERT() macro Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 10/25] qemu/bswap: Use LD_CONVERT macro to emit 16-bit signed load/store code Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 11/25] qemu/bswap: Use LD_CONVERT macro to emit 16-bit unsigned " Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 12/25] qemu/bswap: Use LDST_CONVERT macro to emit 32-bit load/store functions Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 13/25] qemu/bswap: Use LDST_CONVERT macro to emit 64-bit " Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 14/25] qemu/bswap: Introduce load/store for aligned pointer Philippe Mathieu-Daudé
2021-05-18 20:15 ` Peter Maydell
2021-05-19 5:56 ` Philippe Mathieu-Daudé
2021-05-19 9:08 ` Stefan Hajnoczi
2021-05-18 18:36 ` [RFC PATCH 15/25] exec/memory: Add methods for aligned pointer access (address space) Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 16/25] exec/memory: Add methods for aligned pointer access (physical memory) Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 17/25] hw/virtio: Use correct type sizes Philippe Mathieu-Daudé
2021-05-20 16:27 ` Richard Henderson
2021-05-20 19:13 ` Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 18/25] hw/virtio: Introduce VIRTIO_LD_CONVERT() macro Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 19/25] hw/virtio: Use LD_CONVERT macro to emit 16-bit unsigned load/store code Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 20/25] hw/virtio: Introduce VIRTIO_ST_CONVERT() macro Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 21/25] hw/virtio: Use ST_CONVERT() macro to emit 16-bit load/store functions Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 22/25] hw/virtio: Use LDST_CONVERT macro to emit 32-bit " Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 23/25] hw/virtio: Use LDST_CONVERT macro to emit 64-bit " Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 24/25] hw/virtio: Add methods for aligned pointer access Philippe Mathieu-Daudé
2021-05-18 18:36 ` [RFC PATCH 25/25] hw/virtio: Optimize accesses on vring aligned pointers Philippe Mathieu-Daudé
2021-05-18 18:42 ` [RFC PATCH 00/25] exec: Add load/store API for " no-reply
2021-05-19 19:20 ` Richard Henderson
2021-05-19 19:40 ` Philippe Mathieu-Daudé
2021-05-20 16:28 ` Richard Henderson
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