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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: bruno.larsen@eldorado.org.br, qemu-ppc@nongnu.org,
	david@gibson.dropbear.id.au
Subject: [PATCH 19/24] target/ppc: Use bool success for ppc_radix64_xlate
Date: Tue, 18 May 2021 15:11:41 -0500	[thread overview]
Message-ID: <20210518201146.794854-20-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210518201146.794854-1-richard.henderson@linaro.org>

Instead of returning non-zero for failure, return true for success.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/ppc/mmu-radix64.c | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 76a5cc8cdb..7af3e697b2 100644
--- a/target/ppc/mmu-radix64.c
+++ b/target/ppc/mmu-radix64.c
@@ -464,10 +464,10 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu,
  *              | = On        | Process Scoped |    Scoped     |
  *              +-------------+----------------+---------------+
  */
-static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
-                             MMUAccessType access_type,
-                             hwaddr *raddr, int *psizep, int *protp,
-                             bool guest_visible)
+static bool ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
+                              MMUAccessType access_type,
+                              hwaddr *raddr, int *psizep, int *protp,
+                              bool guest_visible)
 {
     CPUPPCState *env = &cpu->env;
     uint64_t lpid, pid;
@@ -493,7 +493,7 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
         }
         *protp = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
         *psizep = TARGET_PAGE_BITS;
-        return 0;
+        return true;
     }
 
     /*
@@ -511,7 +511,7 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
         if (guest_visible) {
             ppc_radix64_raise_segi(cpu, access_type, eaddr);
         }
-        return 1;
+        return false;
     }
 
     /* Get Process Table */
@@ -524,13 +524,13 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
             if (guest_visible) {
                 ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_NOPTE);
             }
-            return 1;
+            return false;
         }
         if (!validate_pate(cpu, lpid, &pate)) {
             if (guest_visible) {
                 ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_R_BADCONFIG);
             }
-            return 1;
+            return false;
         }
     }
 
@@ -550,7 +550,7 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
                                                    pate, &g_raddr, &prot,
                                                    &psize, guest_visible);
         if (ret) {
-            return ret;
+            return false;
         }
         *psizep = MIN(*psizep, psize);
         *protp &= prot;
@@ -574,7 +574,7 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
                                                      &prot, &psize, false,
                                                      guest_visible);
             if (ret) {
-                return ret;
+                return false;
             }
             *psizep = MIN(*psizep, psize);
             *protp &= prot;
@@ -583,7 +583,7 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
         }
     }
 
-    return 0;
+    return true;
 }
 
 int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
@@ -594,8 +594,8 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
     hwaddr raddr;
 
     /* Translate eaddr to raddr (where raddr is addr qemu needs for access) */
-    if (ppc_radix64_xlate(cpu, eaddr, access_type, &raddr,
-                          &page_size, &prot, true)) {
+    if (!ppc_radix64_xlate(cpu, eaddr, access_type, &raddr,
+                           &page_size, &prot, true)) {
         return 1;
     }
 
@@ -609,8 +609,8 @@ hwaddr ppc_radix64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong eaddr)
     int psize, prot;
     hwaddr raddr;
 
-    if (ppc_radix64_xlate(cpu, eaddr, MMU_DATA_LOAD, &raddr,
-                          &psize, &prot, false)) {
+    if (!ppc_radix64_xlate(cpu, eaddr, MMU_DATA_LOAD, &raddr,
+                           &psize, &prot, false)) {
         return -1;
     }
 
-- 
2.25.1



  parent reply	other threads:[~2021-05-18 20:29 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-18 20:11 [PATCH 00/24] target/ppc: Clean up mmu translation Richard Henderson
2021-05-18 20:11 ` [PATCH 01/24] target/ppc: Introduce prot_for_access_type Richard Henderson
2021-05-18 20:11 ` [PATCH 02/24] target/ppc: Use MMUAccessType in mmu-radix64.c Richard Henderson
2021-05-18 20:11 ` [PATCH 03/24] target/ppc: Use MMUAccessType in mmu-hash64.c Richard Henderson
2021-05-18 20:11 ` [PATCH 04/24] target/ppc: Use MMUAccessType in mmu-hash32.c Richard Henderson
2021-05-18 20:11 ` [PATCH 05/24] target/ppc: Rename access_type to type in mmu_helper.c Richard Henderson
2021-05-18 20:11 ` [PATCH 06/24] target/ppc: Use MMUAccessType " Richard Henderson
2021-05-18 20:11 ` [PATCH 07/24] target/ppc: Remove type argument from check_prot Richard Henderson
2021-05-18 20:11 ` [PATCH 08/24] target/ppc: Remove type argument from ppc6xx_tlb_pte_check Richard Henderson
2021-05-18 20:11 ` [PATCH 09/24] target/ppc: Remove type argument from ppc6xx_tlb_check Richard Henderson
2021-05-18 20:11 ` [PATCH 10/24] target/ppc: Remove type argument from get_bat_6xx_tlb Richard Henderson
2021-05-18 20:11 ` [PATCH 11/24] target/ppc: Remove type argument from mmu40x_get_physical_address Richard Henderson
2021-05-18 20:11 ` [PATCH 12/24] target/ppc: Remove type argument from mmubooke_check_tlb Richard Henderson
2021-05-18 20:11 ` [PATCH 13/24] target/ppc: Remove type argument from mmubooke_get_physical_address Richard Henderson
2021-05-18 20:11 ` [PATCH 14/24] target/ppc: Remove type argument from mmubooke206_check_tlb Richard Henderson
2021-05-18 20:11 ` [PATCH 15/24] target/ppc: Remove type argument for mmubooke206_get_physical_address Richard Henderson
2021-05-18 20:11 ` [PATCH 16/24] target/ppc: Remove PowerPCCPUClass.handle_mmu_fault Richard Henderson
2021-05-19 13:02   ` Bruno Piazera Larsen
2021-05-24  3:28   ` David Gibson
2021-05-24  4:36     ` Richard Henderson
2021-05-24  5:11       ` David Gibson
2021-05-18 20:11 ` [PATCH 17/24] target/ppc: Use MMUAccessType with *_handle_mmu_fault Richard Henderson
2021-05-19 13:02   ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 18/24] target/ppc: Push real-mode handling into ppc_radix64_xlate Richard Henderson
2021-05-19 17:44   ` Bruno Piazera Larsen
2021-05-18 20:11 ` Richard Henderson [this message]
2021-05-19 17:53   ` [PATCH 19/24] target/ppc: Use bool success for ppc_radix64_xlate Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 20/24] target/ppc: Split out ppc_hash64_xlate Richard Henderson
2021-05-19 18:09   ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 21/24] target/ppc: Split out ppc_hash32_xlate Richard Henderson
2021-05-19 18:20   ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 22/24] target/ppc: Split out ppc_jumbo_xlate Richard Henderson
2021-05-19 18:40   ` Bruno Piazera Larsen
2021-05-24  3:19     ` David Gibson
2021-05-18 20:11 ` [PATCH 23/24] target/ppc: Introduce ppc_xlate Richard Henderson
2021-05-19 18:53   ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 24/24] target/ppc: Restrict ppc_cpu_tlb_fill to TCG Richard Henderson
2021-05-20 13:18   ` Bruno Piazera Larsen
2021-05-20 14:52     ` Richard Henderson
2021-05-20 17:13       ` Bruno Piazera Larsen
2021-05-19  2:52 ` [PATCH 00/24] target/ppc: Clean up mmu translation David Gibson
2021-05-19 20:37   ` Richard Henderson
2021-05-19 22:47     ` Richard Henderson
2021-05-24  3:26       ` David Gibson
2021-05-24  4:47         ` Richard Henderson
2021-05-24 12:16         ` Bruno Piazera Larsen

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