From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org, groug@kaod.org
Cc: richard.henderson@linaro.org,
David Gibson <david@gibson.dropbear.id.au>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
"Bruno Larsen \(billionai\)" <bruno.larsen@eldorado.org.br>
Subject: [PULL 12/48] target/ppc: created ppc_{store, get}_vscr for generic vscr usage
Date: Wed, 19 May 2021 22:51:12 +1000 [thread overview]
Message-ID: <20210519125148.27720-13-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au>
From: "Bruno Larsen (billionai)" <bruno.larsen@eldorado.org.br>
Some functions unrelated to TCG use helper_m{t,f}vscr, so generic versions
of those functions were added to cpu.c, in preparation for compilation
without TCG
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210512140813.112884-2-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/arch_dump.c | 3 +--
target/ppc/cpu.c | 16 ++++++++++++++++
target/ppc/cpu.h | 2 ++
target/ppc/cpu_init.c | 2 +-
target/ppc/gdbstub.c | 4 ++--
target/ppc/int_helper.c | 9 ++-------
6 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/target/ppc/arch_dump.c b/target/ppc/arch_dump.c
index 9ab04b2c38..9210e61ef4 100644
--- a/target/ppc/arch_dump.c
+++ b/target/ppc/arch_dump.c
@@ -17,7 +17,6 @@
#include "elf.h"
#include "sysemu/dump.h"
#include "sysemu/kvm.h"
-#include "exec/helper-proto.h"
#ifdef TARGET_PPC64
#define ELFCLASS ELFCLASS64
@@ -176,7 +175,7 @@ static void ppc_write_elf_vmxregset(NoteFuncArg *arg, PowerPCCPU *cpu)
vmxregset->avr[i].u64[1] = avr->u64[1];
}
}
- vmxregset->vscr.u32[3] = cpu_to_dump32(s, helper_mfvscr(&cpu->env));
+ vmxregset->vscr.u32[3] = cpu_to_dump32(s, ppc_get_vscr(&cpu->env));
}
static void ppc_write_elf_vsxregset(NoteFuncArg *arg, PowerPCCPU *cpu)
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
index e501a7ff6f..cb794e9f4f 100644
--- a/target/ppc/cpu.c
+++ b/target/ppc/cpu.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "cpu-models.h"
+#include "fpu/softfloat-helpers.h"
target_ulong cpu_read_xer(CPUPPCState *env)
{
@@ -45,3 +46,18 @@ void cpu_write_xer(CPUPPCState *env, target_ulong xer)
(1ul << XER_OV) | (1ul << XER_CA) |
(1ul << XER_OV32) | (1ul << XER_CA32));
}
+
+void ppc_store_vscr(CPUPPCState *env, uint32_t vscr)
+{
+ env->vscr = vscr & ~(1u << VSCR_SAT);
+ /* Which bit we set is completely arbitrary, but clear the rest. */
+ env->vscr_sat.u64[0] = vscr & (1u << VSCR_SAT);
+ env->vscr_sat.u64[1] = 0;
+ set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status);
+}
+
+uint32_t ppc_get_vscr(CPUPPCState *env)
+{
+ uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0;
+ return env->vscr | (sat << VSCR_SAT);
+}
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 98fcf1c4d6..f43ceec5cb 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2651,4 +2651,6 @@ static inline bool ppc_has_spr(PowerPCCPU *cpu, int spr)
void dump_mmu(CPUPPCState *env);
void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);
+void ppc_store_vscr(CPUPPCState *env, uint32_t vscr);
+uint32_t ppc_get_vscr(CPUPPCState *env);
#endif /* PPC_CPU_H */
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index e7903e5f2a..022fa69d2c 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -55,7 +55,7 @@ static inline void vscr_init(CPUPPCState *env, uint32_t val)
{
/* Altivec always uses round-to-nearest */
set_float_rounding_mode(float_round_nearest_even, &env->vec_status);
- helper_mtvscr(env, val);
+ ppc_store_vscr(env, val);
}
/**
diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c
index 94a7273ee0..9339e7eafe 100644
--- a/target/ppc/gdbstub.c
+++ b/target/ppc/gdbstub.c
@@ -498,7 +498,7 @@ static int gdb_get_avr_reg(CPUPPCState *env, GByteArray *buf, int n)
return 16;
}
if (n == 32) {
- gdb_get_reg32(buf, helper_mfvscr(env));
+ gdb_get_reg32(buf, ppc_get_vscr(env));
mem_buf = gdb_get_reg_ptr(buf, 4);
ppc_maybe_bswap_register(env, mem_buf, 4);
return 4;
@@ -529,7 +529,7 @@ static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
}
if (n == 32) {
ppc_maybe_bswap_register(env, mem_buf, 4);
- helper_mtvscr(env, ldl_p(mem_buf));
+ ppc_store_vscr(env, ldl_p(mem_buf));
return 4;
}
if (n == 33) {
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index a44c2d90ea..41f8477d4b 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -462,17 +462,12 @@ SATCVT(sd, uw, int64_t, uint32_t, 0, UINT32_MAX)
void helper_mtvscr(CPUPPCState *env, uint32_t vscr)
{
- env->vscr = vscr & ~(1u << VSCR_SAT);
- /* Which bit we set is completely arbitrary, but clear the rest. */
- env->vscr_sat.u64[0] = vscr & (1u << VSCR_SAT);
- env->vscr_sat.u64[1] = 0;
- set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status);
+ ppc_store_vscr(env, vscr);
}
uint32_t helper_mfvscr(CPUPPCState *env)
{
- uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0;
- return env->vscr | (sat << VSCR_SAT);
+ return ppc_get_vscr(env);
}
static inline void set_vscr_sat(CPUPPCState *env)
--
2.31.1
next prev parent reply other threads:[~2021-05-19 13:03 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-19 12:51 [PULL 00/48] ppc-for-6.1 queue 20210519 David Gibson
2021-05-19 12:51 ` [PULL 01/48] hw/ppc/spapr.c: Extract MMU mode error reporting into a function David Gibson
2021-05-19 12:51 ` [PULL 02/48] hw/ppc/spapr.c: Make sure the host supports the selected MMU mode David Gibson
2021-05-19 12:51 ` [PULL 03/48] target/ppc: Fold gen_*_xer into their callers David Gibson
2021-05-19 12:51 ` [PULL 04/48] target/ppc: renamed SPR registration functions David Gibson
2021-05-19 12:51 ` [PULL 05/48] target/ppc: move SPR R/W callbacks to translate.c David Gibson
2021-05-19 12:51 ` [PULL 06/48] hw/ppc: moved hcalls that depend on softmmu David Gibson
2021-05-19 12:51 ` [PULL 07/48] target/ppc: moved function out of mmu-hash64 David Gibson
2021-05-19 12:51 ` [PULL 08/48] target/ppc: moved ppc_store_lpcr to misc_helper.c David Gibson
2021-05-19 12:51 ` [PULL 09/48] hw/ppc: moved has_spr to cpu.h David Gibson
2021-05-19 12:51 ` [PULL 10/48] target/ppc: turned SPR R/W callbacks not static David Gibson
2021-05-19 12:51 ` [PULL 11/48] target/ppc: isolated cpu init from translation logic David Gibson
2021-05-19 12:51 ` David Gibson [this message]
2021-05-19 12:51 ` [PULL 13/48] target/ppc: updated vscr manipulation in machine.c David Gibson
2021-05-19 12:51 ` [PULL 14/48] target/ppc: moved ppc_store_sdr1 to cpu.c David Gibson
2021-05-19 12:51 ` [PULL 15/48] target/ppc: moved ppc_cpu_dump_state to cpu_init.c David Gibson
2021-05-19 12:51 ` [PULL 16/48] target/ppc: Add cia field to DisasContext David Gibson
2021-05-19 12:51 ` [PULL 17/48] target/ppc: Split out decode_legacy David Gibson
2021-05-19 12:51 ` [PULL 18/48] target/ppc: Move DISAS_NORETURN setting into gen_exception* David Gibson
2021-05-19 12:51 ` [PULL 19/48] target/ppc: Remove special case for POWERPC_SYSCALL David Gibson
2021-05-19 12:51 ` [PULL 20/48] target/ppc: Remove special case for POWERPC_EXCP_TRAP David Gibson
2021-05-19 12:51 ` [PULL 21/48] target/ppc: Simplify gen_debug_exception David Gibson
2021-05-19 12:51 ` [PULL 22/48] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE} David Gibson
2021-05-19 12:51 ` [PULL 23/48] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT David Gibson
2021-05-19 12:51 ` [PULL 24/48] target/ppc: Remove unnecessary gen_io_end calls David Gibson
2021-05-19 12:51 ` [PULL 25/48] target/ppc: Introduce gen_icount_io_start David Gibson
2021-05-19 12:51 ` [PULL 26/48] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE David Gibson
2021-05-19 12:51 ` [PULL 27/48] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN David Gibson
2021-05-19 12:51 ` [PULL 28/48] target/ppc: Remove DisasContext.exception David Gibson
2021-05-19 12:51 ` [PULL 29/48] target/ppc: Move single-step check to ppc_tr_tb_stop David Gibson
2021-05-19 12:51 ` [PULL 30/48] target/ppc: Tidy exception vs exit_tb David Gibson
2021-05-19 12:51 ` [PULL 31/48] target/ppc: Mark helper_raise_exception* as noreturn David Gibson
2021-05-19 12:51 ` [PULL 32/48] target/ppc: Use translator_loop_temp_check David Gibson
2021-05-19 12:51 ` [PULL 33/48] target/ppc: Fix load endianness for lxvwsx/lxvdsx David Gibson
2021-05-19 12:51 ` [PULL 34/48] target/ppc: Introduce prot_for_access_type David Gibson
2021-05-19 12:51 ` [PULL 35/48] target/ppc: Use MMUAccessType in mmu-radix64.c David Gibson
2021-05-19 12:51 ` [PULL 36/48] target/ppc: Use MMUAccessType in mmu-hash64.c David Gibson
2021-05-19 12:51 ` [PULL 37/48] target/ppc: Use MMUAccessType in mmu-hash32.c David Gibson
2021-05-19 12:51 ` [PULL 38/48] target/ppc: Rename access_type to type in mmu_helper.c David Gibson
2021-05-19 12:51 ` [PULL 39/48] target/ppc: Use MMUAccessType " David Gibson
2021-05-19 12:51 ` [PULL 40/48] target/ppc: Remove type argument from check_prot David Gibson
2021-05-19 12:51 ` [PULL 41/48] target/ppc: Remove type argument from ppc6xx_tlb_pte_check David Gibson
2021-05-19 12:51 ` [PULL 42/48] target/ppc: Remove type argument from ppc6xx_tlb_check David Gibson
2021-05-19 12:51 ` [PULL 43/48] target/ppc: Remove type argument from get_bat_6xx_tlb David Gibson
2021-05-19 12:51 ` [PULL 44/48] target/ppc: Remove type argument from mmu40x_get_physical_address David Gibson
2021-05-19 12:51 ` [PULL 45/48] target/ppc: Remove type argument from mmubooke_check_tlb David Gibson
2021-05-19 12:51 ` [PULL 46/48] target/ppc: Remove type argument from mmubooke_get_physical_address David Gibson
2021-05-19 12:51 ` [PULL 47/48] target/ppc: Remove type argument from mmubooke206_check_tlb David Gibson
2021-05-19 12:51 ` [PULL 48/48] target/ppc: Remove type argument for mmubooke206_get_physical_address David Gibson
2021-05-19 13:46 ` [PULL 00/48] ppc-for-6.1 queue 20210519 no-reply
2021-05-20 0:42 ` David Gibson
2021-05-20 9:00 ` Peter Maydell
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