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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org, groug@kaod.org
Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org,
	qemu-devel@nongnu.org, David Gibson <david@gibson.dropbear.id.au>
Subject: [PULL 34/48] target/ppc: Introduce prot_for_access_type
Date: Wed, 19 May 2021 22:51:34 +1000	[thread overview]
Message-ID: <20210519125148.27720-35-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au>

From: Richard Henderson <richard.henderson@linaro.org>

Use this in the three places we currently have a local array
indexed by rwx (which happens to have the same values).
The types will match up correctly with additional changes.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210518201146.794854-2-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target/ppc/internal.h    | 19 +++++++++++++++++++
 target/ppc/mmu-hash32.c  |  8 +++++---
 target/ppc/mmu-hash64.c  | 10 ++++++----
 target/ppc/mmu-radix64.c |  6 ++++--
 4 files changed, 34 insertions(+), 9 deletions(-)

diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index 184ba6d6b3..2b4b06eb76 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -228,4 +228,23 @@ void destroy_ppc_opcodes(PowerPCCPU *cpu);
 void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *ppc);
 gchar *ppc_gdb_arch_name(CPUState *cs);
 
+/**
+ * prot_for_access_type:
+ * @access_type: Access type
+ *
+ * Return the protection bit required for the given access type.
+ */
+static inline int prot_for_access_type(MMUAccessType access_type)
+{
+    switch (access_type) {
+    case MMU_INST_FETCH:
+        return PAGE_EXEC;
+    case MMU_DATA_LOAD:
+        return PAGE_READ;
+    case MMU_DATA_STORE:
+        return PAGE_WRITE;
+    }
+    g_assert_not_reached();
+}
+
 #endif /* PPC_INTERNAL_H */
diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c
index 178cf090b7..233a66658e 100644
--- a/target/ppc/mmu-hash32.c
+++ b/target/ppc/mmu-hash32.c
@@ -24,6 +24,7 @@
 #include "exec/helper-proto.h"
 #include "sysemu/kvm.h"
 #include "kvm_ppc.h"
+#include "internal.h"
 #include "mmu-hash32.h"
 #include "exec/log.h"
 
@@ -421,10 +422,11 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
     hwaddr pte_offset;
     ppc_hash_pte32_t pte;
     int prot;
-    const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC};
+    int need_prot;
     hwaddr raddr;
 
     assert((rwx == 0) || (rwx == 1) || (rwx == 2));
+    need_prot = prot_for_access_type(rwx);
 
     /* 1. Handle real mode accesses */
     if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) {
@@ -440,7 +442,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
     if (env->nb_BATs != 0) {
         raddr = ppc_hash32_bat_lookup(cpu, eaddr, rwx, &prot);
         if (raddr != -1) {
-            if (need_prot[rwx] & ~prot) {
+            if (need_prot & ~prot) {
                 if (rwx == 2) {
                     cs->exception_index = POWERPC_EXCP_ISI;
                     env->error_code = 0x08000000;
@@ -513,7 +515,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
 
     prot = ppc_hash32_pte_prot(cpu, sr, pte);
 
-    if (need_prot[rwx] & ~prot) {
+    if (need_prot & ~prot) {
         /* Access right violation */
         qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n");
         if (rwx == 2) {
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index c4a4bc7cd2..d5b70ddc9c 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -29,6 +29,7 @@
 #include "mmu-hash64.h"
 #include "exec/log.h"
 #include "hw/hw.h"
+#include "internal.h"
 #include "mmu-book3s-v3.h"
 #include "helper_regs.h"
 
@@ -876,7 +877,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
     hwaddr ptex;
     ppc_hash_pte64_t pte;
     int exec_prot, pp_prot, amr_prot, prot;
-    const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC};
+    int need_prot;
     hwaddr raddr;
 
     assert((rwx == 0) || (rwx == 1) || (rwx == 2));
@@ -996,7 +997,8 @@ skip_slb_search:
     amr_prot = ppc_hash64_amr_prot(cpu, pte);
     prot = exec_prot & pp_prot & amr_prot;
 
-    if ((need_prot[rwx] & ~prot) != 0) {
+    need_prot = prot_for_access_type(rwx);
+    if (need_prot & ~prot) {
         /* Access right violation */
         qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n");
         if (rwx == 2) {
@@ -1012,13 +1014,13 @@ skip_slb_search:
             ppc_hash64_set_isi(cs, srr1);
         } else {
             int dsisr = 0;
-            if (need_prot[rwx] & ~pp_prot) {
+            if (need_prot & ~pp_prot) {
                 dsisr |= DSISR_PROTFAULT;
             }
             if (rwx == 1) {
                 dsisr |= DSISR_ISSTORE;
             }
-            if (need_prot[rwx] & ~amr_prot) {
+            if (need_prot & ~amr_prot) {
                 dsisr |= DSISR_AMR;
             }
             ppc_hash64_set_dsi(cs, eaddr, dsisr);
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 30fcfcf11f..646b9afb7b 100644
--- a/target/ppc/mmu-radix64.c
+++ b/target/ppc/mmu-radix64.c
@@ -25,6 +25,7 @@
 #include "sysemu/kvm.h"
 #include "kvm_ppc.h"
 #include "exec/log.h"
+#include "internal.h"
 #include "mmu-radix64.h"
 #include "mmu-book3s-v3.h"
 
@@ -135,7 +136,7 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte,
                                    bool partition_scoped)
 {
     CPUPPCState *env = &cpu->env;
-    const int need_prot[] = { PAGE_READ, PAGE_WRITE, PAGE_EXEC };
+    int need_prot;
 
     /* Check Page Attributes (pte58:59) */
     if (((pte & R_PTE_ATT) == R_PTE_ATT_NI_IO) && (rwx == 2)) {
@@ -158,7 +159,8 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte,
     }
 
     /* Check if requested access type is allowed */
-    if (need_prot[rwx] & ~(*prot)) { /* Page Protected for that Access */
+    need_prot = prot_for_access_type(rwx);
+    if (need_prot & ~*prot) { /* Page Protected for that Access */
         *fault_cause |= DSISR_PROTFAULT;
         return true;
     }
-- 
2.31.1



  parent reply	other threads:[~2021-05-19 13:18 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-19 12:51 [PULL 00/48] ppc-for-6.1 queue 20210519 David Gibson
2021-05-19 12:51 ` [PULL 01/48] hw/ppc/spapr.c: Extract MMU mode error reporting into a function David Gibson
2021-05-19 12:51 ` [PULL 02/48] hw/ppc/spapr.c: Make sure the host supports the selected MMU mode David Gibson
2021-05-19 12:51 ` [PULL 03/48] target/ppc: Fold gen_*_xer into their callers David Gibson
2021-05-19 12:51 ` [PULL 04/48] target/ppc: renamed SPR registration functions David Gibson
2021-05-19 12:51 ` [PULL 05/48] target/ppc: move SPR R/W callbacks to translate.c David Gibson
2021-05-19 12:51 ` [PULL 06/48] hw/ppc: moved hcalls that depend on softmmu David Gibson
2021-05-19 12:51 ` [PULL 07/48] target/ppc: moved function out of mmu-hash64 David Gibson
2021-05-19 12:51 ` [PULL 08/48] target/ppc: moved ppc_store_lpcr to misc_helper.c David Gibson
2021-05-19 12:51 ` [PULL 09/48] hw/ppc: moved has_spr to cpu.h David Gibson
2021-05-19 12:51 ` [PULL 10/48] target/ppc: turned SPR R/W callbacks not static David Gibson
2021-05-19 12:51 ` [PULL 11/48] target/ppc: isolated cpu init from translation logic David Gibson
2021-05-19 12:51 ` [PULL 12/48] target/ppc: created ppc_{store, get}_vscr for generic vscr usage David Gibson
2021-05-19 12:51 ` [PULL 13/48] target/ppc: updated vscr manipulation in machine.c David Gibson
2021-05-19 12:51 ` [PULL 14/48] target/ppc: moved ppc_store_sdr1 to cpu.c David Gibson
2021-05-19 12:51 ` [PULL 15/48] target/ppc: moved ppc_cpu_dump_state to cpu_init.c David Gibson
2021-05-19 12:51 ` [PULL 16/48] target/ppc: Add cia field to DisasContext David Gibson
2021-05-19 12:51 ` [PULL 17/48] target/ppc: Split out decode_legacy David Gibson
2021-05-19 12:51 ` [PULL 18/48] target/ppc: Move DISAS_NORETURN setting into gen_exception* David Gibson
2021-05-19 12:51 ` [PULL 19/48] target/ppc: Remove special case for POWERPC_SYSCALL David Gibson
2021-05-19 12:51 ` [PULL 20/48] target/ppc: Remove special case for POWERPC_EXCP_TRAP David Gibson
2021-05-19 12:51 ` [PULL 21/48] target/ppc: Simplify gen_debug_exception David Gibson
2021-05-19 12:51 ` [PULL 22/48] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE} David Gibson
2021-05-19 12:51 ` [PULL 23/48] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT David Gibson
2021-05-19 12:51 ` [PULL 24/48] target/ppc: Remove unnecessary gen_io_end calls David Gibson
2021-05-19 12:51 ` [PULL 25/48] target/ppc: Introduce gen_icount_io_start David Gibson
2021-05-19 12:51 ` [PULL 26/48] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE David Gibson
2021-05-19 12:51 ` [PULL 27/48] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN David Gibson
2021-05-19 12:51 ` [PULL 28/48] target/ppc: Remove DisasContext.exception David Gibson
2021-05-19 12:51 ` [PULL 29/48] target/ppc: Move single-step check to ppc_tr_tb_stop David Gibson
2021-05-19 12:51 ` [PULL 30/48] target/ppc: Tidy exception vs exit_tb David Gibson
2021-05-19 12:51 ` [PULL 31/48] target/ppc: Mark helper_raise_exception* as noreturn David Gibson
2021-05-19 12:51 ` [PULL 32/48] target/ppc: Use translator_loop_temp_check David Gibson
2021-05-19 12:51 ` [PULL 33/48] target/ppc: Fix load endianness for lxvwsx/lxvdsx David Gibson
2021-05-19 12:51 ` David Gibson [this message]
2021-05-19 12:51 ` [PULL 35/48] target/ppc: Use MMUAccessType in mmu-radix64.c David Gibson
2021-05-19 12:51 ` [PULL 36/48] target/ppc: Use MMUAccessType in mmu-hash64.c David Gibson
2021-05-19 12:51 ` [PULL 37/48] target/ppc: Use MMUAccessType in mmu-hash32.c David Gibson
2021-05-19 12:51 ` [PULL 38/48] target/ppc: Rename access_type to type in mmu_helper.c David Gibson
2021-05-19 12:51 ` [PULL 39/48] target/ppc: Use MMUAccessType " David Gibson
2021-05-19 12:51 ` [PULL 40/48] target/ppc: Remove type argument from check_prot David Gibson
2021-05-19 12:51 ` [PULL 41/48] target/ppc: Remove type argument from ppc6xx_tlb_pte_check David Gibson
2021-05-19 12:51 ` [PULL 42/48] target/ppc: Remove type argument from ppc6xx_tlb_check David Gibson
2021-05-19 12:51 ` [PULL 43/48] target/ppc: Remove type argument from get_bat_6xx_tlb David Gibson
2021-05-19 12:51 ` [PULL 44/48] target/ppc: Remove type argument from mmu40x_get_physical_address David Gibson
2021-05-19 12:51 ` [PULL 45/48] target/ppc: Remove type argument from mmubooke_check_tlb David Gibson
2021-05-19 12:51 ` [PULL 46/48] target/ppc: Remove type argument from mmubooke_get_physical_address David Gibson
2021-05-19 12:51 ` [PULL 47/48] target/ppc: Remove type argument from mmubooke206_check_tlb David Gibson
2021-05-19 12:51 ` [PULL 48/48] target/ppc: Remove type argument for mmubooke206_get_physical_address David Gibson
2021-05-19 13:46 ` [PULL 00/48] ppc-for-6.1 queue 20210519 no-reply
2021-05-20  0:42   ` David Gibson
2021-05-20  9:00 ` Peter Maydell

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