From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 20/31] cpu: Move AVR target vmsd field from CPUClass to DeviceClass
Date: Wed, 26 May 2021 16:46:59 -0700 [thread overview]
Message-ID: <20210526234710.125396-21-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210526234710.125396-1-richard.henderson@linaro.org>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
See rationale in previous commit. Targets should use the vmsd field
of DeviceClass, not CPUClass. As migration is not important on the
AVR target, break the migration compatibility and set the DeviceClass
vmsd field. To feel safer, increment the vmstate version.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210517105140.1062037-14-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/avr/cpu.c | 2 +-
target/avr/machine.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 37a8ebcc86..3353bcb9fc 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -213,7 +213,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
cc->set_pc = avr_cpu_set_pc;
cc->memory_rw_debug = avr_cpu_memory_rw_debug;
cc->get_phys_page_debug = avr_cpu_get_phys_page_debug;
- cc->legacy_vmsd = &vms_avr_cpu;
+ dc->vmsd = &vms_avr_cpu;
cc->disas_set_info = avr_cpu_disas_set_info;
cc->gdb_read_register = avr_cpu_gdb_read_register;
cc->gdb_write_register = avr_cpu_gdb_write_register;
diff --git a/target/avr/machine.c b/target/avr/machine.c
index de264f57c3..16f7a3e031 100644
--- a/target/avr/machine.c
+++ b/target/avr/machine.c
@@ -98,8 +98,8 @@ static const VMStateInfo vms_eind = {
const VMStateDescription vms_avr_cpu = {
.name = "cpu",
- .version_id = 0,
- .minimum_version_id = 0,
+ .version_id = 1,
+ .minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32(env.pc_w, AVRCPU),
VMSTATE_UINT32(env.sp, AVRCPU),
--
2.25.1
next prev parent reply other threads:[~2021-05-27 0:03 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-26 23:46 [PULL 00/31] tcg patch queue Richard Henderson
2021-05-26 23:46 ` [PULL 01/31] exec/memory_ldst_cached: Sort declarations Richard Henderson
2021-05-26 23:46 ` [PULL 02/31] exec/memory_ldst_phys: " Richard Henderson
2021-05-26 23:46 ` [PULL 03/31] exec/memory_ldst: Use correct type sizes Richard Henderson
2021-05-26 23:46 ` [PULL 04/31] exec/memory_ldst_phys: " Richard Henderson
2021-05-26 23:46 ` [PULL 05/31] exec/memory_ldst_cached: Use correct type size Richard Henderson
2021-05-26 23:46 ` [PULL 06/31] exec/memory: " Richard Henderson
2021-05-26 23:46 ` [PULL 07/31] accel/tcg: Reduce 'exec/tb-context.h' inclusion Richard Henderson
2021-05-28 15:44 ` Philippe Mathieu-Daudé
2021-05-26 23:46 ` [PULL 08/31] accel/tcg: Keep TranslationBlock headers local to TCG Richard Henderson
2021-05-26 23:46 ` [PULL 09/31] replay: fix watchpoint processing for reverse debugging Richard Henderson
2021-05-26 23:46 ` [PULL 10/31] tcg/aarch64: Fix tcg_out_rotl Richard Henderson
2021-05-26 23:46 ` [PULL 11/31] cpu: Remove duplicated 'sysemu/hw_accel.h' header Richard Henderson
2021-05-26 23:46 ` [PULL 12/31] cpu: Split as cpu-common / cpu-sysemu Richard Henderson
2021-05-26 23:46 ` [PULL 13/31] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Richard Henderson
2021-05-26 23:46 ` [PULL 14/31] cpu: Introduce cpu_virtio_is_big_endian() Richard Henderson
2021-05-26 23:46 ` [PULL 15/31] cpu: Directly use cpu_write_elf*() fallback handlers in place Richard Henderson
2021-05-26 23:46 ` [PULL 16/31] cpu: Directly use get_paging_enabled() " Richard Henderson
2021-05-26 23:46 ` [PULL 17/31] cpu: Directly use get_memory_mapping() " Richard Henderson
2021-05-26 23:46 ` [PULL 18/31] cpu: Assert DeviceClass::vmsd is NULL on user emulation Richard Henderson
2021-05-26 23:46 ` [PULL 19/31] cpu: Rename CPUClass vmsd -> legacy_vmsd Richard Henderson
2021-05-26 23:46 ` Richard Henderson [this message]
2021-05-26 23:47 ` [PULL 21/31] cpu: Introduce SysemuCPUOps structure Richard Henderson
2021-05-26 23:47 ` [PULL 22/31] cpu: Move CPUClass::vmsd to SysemuCPUOps Richard Henderson
2021-05-26 23:47 ` [PULL 23/31] cpu: Move CPUClass::virtio_is_big_endian " Richard Henderson
2021-05-26 23:47 ` [PULL 24/31] cpu: Move CPUClass::get_crash_info " Richard Henderson
2021-05-26 23:47 ` [PULL 25/31] cpu: Move CPUClass::write_elf* " Richard Henderson
2021-05-26 23:47 ` [PULL 26/31] cpu: Move CPUClass::asidx_from_attrs " Richard Henderson
2021-05-26 23:47 ` [PULL 27/31] cpu: Move CPUClass::get_phys_page_debug " Richard Henderson
2021-05-26 23:47 ` [PULL 28/31] cpu: Move CPUClass::get_memory_mapping " Richard Henderson
2021-05-26 23:47 ` [PULL 29/31] cpu: Move CPUClass::get_paging_enabled " Richard Henderson
2021-05-26 23:47 ` [PULL 30/31] target/mips: Fold jazz behaviour into mips_cpu_do_transaction_failed Richard Henderson
2021-05-26 23:47 ` [PULL 31/31] hw/core: Constify TCGCPUOps Richard Henderson
2021-05-28 18:25 ` [PULL 00/31] tcg patch queue Peter Maydell
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