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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id s1sm605959pfc.6.2021.05.26.21.14.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 May 2021 21:14:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 11/11] target/mips: Drop denormal operand to update_msacsr Date: Wed, 26 May 2021 21:14:05 -0700 Message-Id: <20210527041405.391567-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210527041405.391567-1-richard.henderson@linaro.org> References: <20210527041405.391567-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, Yongbok Kim , mmorrell@tachyum.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The comment about not signaling all underflow cases is almost certainly incorrect. It has been there since the initial commit of the file. There is a bit of code below that sets underflow with float_flag_oflush_denormal, which is probably the fix for whatever the original case may have been. Cc: Yongbok Kim Cc: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/mips/tcg/msa_helper.c | 32 ++++++++++---------------------- 1 file changed, 10 insertions(+), 22 deletions(-) diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c index ffe6e630ed..b752373bce 100644 --- a/target/mips/tcg/msa_helper.c +++ b/target/mips/tcg/msa_helper.c @@ -6205,7 +6205,7 @@ static int ieee_to_mips_xcpt_msa(int ieee_xcpt) return mips_xcpt; } -static int update_msacsr(CPUMIPSState *env, int action, int denormal) +static int update_msacsr(CPUMIPSState *env, int action) { int ieee_exception_flags; int mips_exception_flags = 0; @@ -6215,10 +6215,6 @@ static int update_msacsr(CPUMIPSState *env, int action, int denormal) ieee_exception_flags = get_float_exception_flags( &env->active_tc.msa_fp_status); - /* QEMU softfloat does not signal all underflow cases */ - if (denormal) { - ieee_exception_flags |= float_flag_underflow; - } if (ieee_exception_flags) { mips_exception_flags = ieee_to_mips_xcpt_msa(ieee_exception_flags); } @@ -6469,7 +6465,7 @@ static int32_t float64_to_q32(float64 a, float_status *status) cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status); \ } \ DEST = cond ? M_MAX_UINT(BITS) : 0; \ - c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \ + c = update_msacsr(env, CLEAR_IS_INEXACT); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ @@ -7043,13 +7039,6 @@ void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd, compare_ne(env, pwd, pws, pwt, df, 0, GETPC()); } -#define float16_is_zero(ARG) 0 -#define float16_is_zero_or_denormal(ARG) 0 - -#define IS_DENORMAL(ARG, BITS) \ - (!float ## BITS ## _is_zero(ARG) \ - && float ## BITS ## _is_zero_or_denormal(ARG)) - #define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \ do { \ float_status *status = &env->active_tc.msa_fp_status; \ @@ -7057,7 +7046,7 @@ void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd, \ set_float_exception_flags(0, status); \ DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \ - c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ + c = update_msacsr(env, 0); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ @@ -7193,7 +7182,7 @@ void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd, \ set_float_exception_flags(0, status); \ DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status); \ - c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ + c = update_msacsr(env, 0); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ @@ -7312,7 +7301,7 @@ void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd, \ set_float_exception_flags(0, status); \ DEST = float ## BITS ## _ ## OP(ARG, status); \ - c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ + c = update_msacsr(env, 0); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ @@ -7365,7 +7354,7 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd, \ set_float_exception_flags(0, status); \ DEST = float ## BITS ## _ ## OP(ARG, status); \ - c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \ + c = update_msacsr(env, CLEAR_FS_UNDERFLOW); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c; \ @@ -7416,7 +7405,7 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, \ set_float_exception_flags(0, status); \ DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \ - c = update_msacsr(env, 0, 0); \ + c = update_msacsr(env, 0); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ @@ -7672,7 +7661,7 @@ void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df, \ set_float_exception_flags(0, status); \ DEST = float ## BITS ## _ ## OP(ARG, status); \ - c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \ + c = update_msacsr(env, CLEAR_FS_UNDERFLOW); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ @@ -7780,8 +7769,7 @@ void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd, DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \ c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \ float ## BITS ## _is_quiet_nan(DEST, status) ? \ - 0 : RECIPROCAL_INEXACT, \ - IS_DENORMAL(DEST, BITS)); \ + 0 : RECIPROCAL_INEXACT); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ @@ -7897,7 +7885,7 @@ void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd, (~float_flag_inexact), \ status); \ \ - c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ + c = update_msacsr(env, 0); \ \ if (get_enabled_exceptions(env, c)) { \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ -- 2.25.1