From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH 4/6] target/microblaze: Fix Exception Status Register 'Cause' definitions
Date: Thu, 3 Jun 2021 11:03:08 +0200 [thread overview]
Message-ID: <20210603090310.2749892-5-f4bug@amsat.org> (raw)
In-Reply-To: <20210603090310.2749892-1-f4bug@amsat.org>
See 'MicroBlaze Processor Reference Guide' UG081 (v9.0),
Table 1-11: "Exception Status Register (ESR)".
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/microblaze/cpu.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index e4bba8a7551..42b9ad8d313 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -95,10 +95,10 @@ typedef struct CPUMBState CPUMBState;
#define ESR_EC_FPU 6
#define ESR_EC_PRIVINSN 7
#define ESR_EC_STACKPROT 7 /* Same as PRIVINSN. */
-#define ESR_EC_DATA_STORAGE 8
-#define ESR_EC_INSN_STORAGE 9
-#define ESR_EC_DATA_TLB 10
-#define ESR_EC_INSN_TLB 11
+#define ESR_EC_DATA_STORAGE 16
+#define ESR_EC_INSN_STORAGE 17
+#define ESR_EC_DATA_TLB 18
+#define ESR_EC_INSN_TLB 19
#define ESR_EC_MASK 31
/* Floating Point Status Register (FSR) Bits */
--
2.26.3
next prev parent reply other threads:[~2021-06-03 9:09 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 9:03 [PATCH 0/6] target/microblaze: Clean up MMU translation failed path Philippe Mathieu-Daudé
2021-06-03 9:03 ` [PATCH 1/6] target/microblaze: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
2021-06-03 16:29 ` Edgar E. Iglesias
2021-06-03 16:34 ` Richard Henderson
2021-06-03 23:34 ` Alistair Francis
2021-06-03 9:03 ` [PATCH 2/6] target/microblaze: Extract FPU helpers to fpu_helper.c Philippe Mathieu-Daudé
2021-06-03 16:29 ` Edgar E. Iglesias
2021-06-03 23:35 ` Alistair Francis
2021-06-03 9:03 ` [PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled Philippe Mathieu-Daudé
2021-06-03 16:30 ` Edgar E. Iglesias
2021-06-03 9:03 ` Philippe Mathieu-Daudé [this message]
2021-06-03 16:35 ` [PATCH 4/6] target/microblaze: Fix Exception Status Register 'Cause' definitions Edgar E. Iglesias
2021-06-03 9:03 ` [PATCH 5/6] target/microblaze: Replace magic values by proper definitions Philippe Mathieu-Daudé
2021-06-03 16:36 ` Edgar E. Iglesias
2021-06-03 16:37 ` Richard Henderson
2021-06-03 9:03 ` [PATCH 6/6] target/microblaze: Set OPB bits in tlb_fill, not in transaction_failed Philippe Mathieu-Daudé
2021-06-03 16:47 ` Edgar E. Iglesias
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210603090310.2749892-5-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=alistair.francis@wdc.com \
--cc=edgar.iglesias@gmail.com \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).