From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: Richard Henderson <richard.henderson@linaro.org>,
Alistair Francis <alistair.francis@wdc.com>,
qemu-devel@nongnu.org
Subject: Re: [PATCH 5/6] target/microblaze: Replace magic values by proper definitions
Date: Thu, 3 Jun 2021 18:36:45 +0200 [thread overview]
Message-ID: <20210603163645.GL477672@toto> (raw)
In-Reply-To: <20210603090310.2749892-6-f4bug@amsat.org>
On Thu, Jun 03, 2021 at 11:03:09AM +0200, Philippe Mathieu-Daudé wrote:
> Use the Exception Status Register definitions from "cpu.h".
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
> target/microblaze/helper.c | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
> index 20dbd673136..d537f300ca6 100644
> --- a/target/microblaze/helper.c
> +++ b/target/microblaze/helper.c
> @@ -99,14 +99,22 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> mmu_idx, address);
>
> env->ear = address;
> +
> + env->esr = (access_type == MMU_DATA_STORE) ? ESR_S : 0;
> switch (lu.err) {
> case ERR_PROT:
> - env->esr = access_type == MMU_INST_FETCH ? 17 : 16;
> - env->esr |= (access_type == MMU_DATA_STORE) << 10;
> + if (access_type == MMU_INST_FETCH) {
> + env->esr |= ESR_EC_INSN_STORAGE;
> + } else {
> + env->esr |= ESR_EC_DATA_STORAGE;
> + }
> break;
> case ERR_MISS:
> - env->esr = access_type == MMU_INST_FETCH ? 19 : 18;
> - env->esr |= (access_type == MMU_DATA_STORE) << 10;
> + if (access_type == MMU_INST_FETCH) {
> + env->esr |= ESR_EC_INSN_TLB;
> + } else {
> + env->esr |= ESR_EC_DATA_TLB;
> + }
> break;
> default:
> abort();
> --
> 2.26.3
>
next prev parent reply other threads:[~2021-06-03 16:52 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 9:03 [PATCH 0/6] target/microblaze: Clean up MMU translation failed path Philippe Mathieu-Daudé
2021-06-03 9:03 ` [PATCH 1/6] target/microblaze: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
2021-06-03 16:29 ` Edgar E. Iglesias
2021-06-03 16:34 ` Richard Henderson
2021-06-03 23:34 ` Alistair Francis
2021-06-03 9:03 ` [PATCH 2/6] target/microblaze: Extract FPU helpers to fpu_helper.c Philippe Mathieu-Daudé
2021-06-03 16:29 ` Edgar E. Iglesias
2021-06-03 23:35 ` Alistair Francis
2021-06-03 9:03 ` [PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled Philippe Mathieu-Daudé
2021-06-03 16:30 ` Edgar E. Iglesias
2021-06-03 9:03 ` [PATCH 4/6] target/microblaze: Fix Exception Status Register 'Cause' definitions Philippe Mathieu-Daudé
2021-06-03 16:35 ` Edgar E. Iglesias
2021-06-03 9:03 ` [PATCH 5/6] target/microblaze: Replace magic values by proper definitions Philippe Mathieu-Daudé
2021-06-03 16:36 ` Edgar E. Iglesias [this message]
2021-06-03 16:37 ` Richard Henderson
2021-06-03 9:03 ` [PATCH 6/6] target/microblaze: Set OPB bits in tlb_fill, not in transaction_failed Philippe Mathieu-Daudé
2021-06-03 16:47 ` Edgar E. Iglesias
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