From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>
Subject: [PULL 01/15] tcg: Change parameters for tcg_target_const_match
Date: Fri, 4 Jun 2021 13:11:56 -0700 [thread overview]
Message-ID: <20210604201210.920136-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210604201210.920136-1-richard.henderson@linaro.org>
Change the return value to bool, because that's what is should
have been from the start. Pass the ct mask instead of the whole
TCGArgConstraint, as that's the only part that's relevant.
Change the value argument to int64_t. We will need the extra
width for 32-bit hosts wanting to match vector constants.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg.c | 5 ++---
tcg/aarch64/tcg-target.c.inc | 5 +----
tcg/arm/tcg-target.c.inc | 5 +----
tcg/i386/tcg-target.c.inc | 4 +---
tcg/mips/tcg-target.c.inc | 5 +----
tcg/ppc/tcg-target.c.inc | 4 +---
tcg/riscv/tcg-target.c.inc | 4 +---
tcg/s390/tcg-target.c.inc | 5 +----
tcg/sparc/tcg-target.c.inc | 5 +----
tcg/tci/tcg-target.c.inc | 6 ++----
10 files changed, 12 insertions(+), 36 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index db806a6658..0dc271aac9 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -148,8 +148,7 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
static bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val,
TCGReg base, intptr_t ofs);
static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target);
-static int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct);
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct);
#ifdef TCG_TARGET_NEED_LDST_LABELS
static int tcg_out_ldst_finalize(TCGContext *s);
#endif
@@ -4078,7 +4077,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
ts = arg_temp(arg);
if (ts->val_type == TEMP_VAL_CONST
- && tcg_target_const_match(ts->val, ts->type, arg_ct)) {
+ && tcg_target_const_match(ts->val, ts->type, arg_ct->ct)) {
/* constant is OK for instruction */
const_args[i] = 1;
new_args[i] = ts->val;
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 5bd366f2d4..27cde314a9 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -277,11 +277,8 @@ static bool is_shimm1632(uint32_t v32, int *cmode, int *imm8)
}
}
-static int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- int ct = arg_ct->ct;
-
if (ct & TCG_CT_CONST) {
return 1;
}
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 8457108a87..eb4f42e53d 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -301,11 +301,8 @@ static inline int check_fit_imm(uint32_t imm)
* mov operand2: values represented with x << (2 * y), x < 0x100
* add, sub, eor...: ditto
*/
-static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- int ct;
- ct = arg_ct->ct;
if (ct & TCG_CT_CONST) {
return 1;
} else if ((ct & TCG_CT_CONST_ARM) && check_fit_imm(val)) {
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 415c5c0796..34113388ef 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -210,10 +210,8 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
}
/* test if a constant matches the constraint */
-static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- int ct = arg_ct->ct;
if (ct & TCG_CT_CONST) {
return 1;
}
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 8b16726242..5944448b2a 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -193,11 +193,8 @@ static inline bool is_p2m1(tcg_target_long val)
}
/* test if a constant matches the constraint */
-static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- int ct;
- ct = arg_ct->ct;
if (ct & TCG_CT_CONST) {
return 1;
} else if ((ct & TCG_CT_CONST_ZERO) && val == 0) {
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 838ccfa42d..795701442b 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -238,10 +238,8 @@ static bool reloc_pc14(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
}
/* test if a constant matches the constraint */
-static int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- int ct = arg_ct->ct;
if (ct & TCG_CT_CONST) {
return 1;
}
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index ef43147040..da7eecafc5 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -145,10 +145,8 @@ static inline tcg_target_long sextreg(tcg_target_long val, int pos, int len)
}
/* test if a constant matches the constraint */
-static int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- int ct = arg_ct->ct;
if (ct & TCG_CT_CONST) {
return 1;
}
diff --git a/tcg/s390/tcg-target.c.inc b/tcg/s390/tcg-target.c.inc
index af8dfe81ac..5fe073f09a 100644
--- a/tcg/s390/tcg-target.c.inc
+++ b/tcg/s390/tcg-target.c.inc
@@ -417,11 +417,8 @@ static bool patch_reloc(tcg_insn_unit *src_rw, int type,
}
/* Test if a constant matches the constraint. */
-static int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- int ct = arg_ct->ct;
-
if (ct & TCG_CT_CONST) {
return 1;
}
diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc
index 3d50f985c6..ce39ac2d86 100644
--- a/tcg/sparc/tcg-target.c.inc
+++ b/tcg/sparc/tcg-target.c.inc
@@ -341,11 +341,8 @@ static bool patch_reloc(tcg_insn_unit *src_rw, int type,
}
/* test if a constant matches the constraint */
-static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- int ct = arg_ct->ct;
-
if (ct & TCG_CT_CONST) {
return 1;
}
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index ee6cdfec71..823ecd5d35 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -789,11 +789,9 @@ static inline bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val,
}
/* Test if a constant matches the constraint. */
-static int tcg_target_const_match(tcg_target_long val, TCGType type,
- const TCGArgConstraint *arg_ct)
+static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
{
- /* No need to return 0 or 1, 0 or != 0 is good enough. */
- return arg_ct->ct & TCG_CT_CONST;
+ return ct & TCG_CT_CONST;
}
static void tcg_target_init(TCGContext *s)
--
2.25.1
next prev parent reply other threads:[~2021-06-04 20:13 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-04 20:11 [PULL 00/15] tcg patch queue Richard Henderson
2021-06-04 20:11 ` Richard Henderson [this message]
2021-06-04 20:11 ` [PULL 02/15] tcg/arm: Add host vector framework Richard Henderson
2021-06-04 20:11 ` [PULL 03/15] tcg/arm: Implement tcg_out_ld/st for vector types Richard Henderson
2021-06-04 20:11 ` [PULL 04/15] tcg/arm: Implement tcg_out_mov " Richard Henderson
2021-06-04 20:12 ` [PULL 05/15] tcg/arm: Implement tcg_out_dup*_vec Richard Henderson
2021-06-04 20:12 ` [PULL 06/15] tcg/arm: Implement minimal vector operations Richard Henderson
2021-06-04 20:12 ` [PULL 07/15] tcg/arm: Implement andc, orc, abs, neg, not " Richard Henderson
2021-06-04 20:12 ` [PULL 08/15] tcg/arm: Implement TCG_TARGET_HAS_shi_vec Richard Henderson
2021-06-04 20:12 ` [PULL 09/15] tcg/arm: Implement TCG_TARGET_HAS_mul_vec Richard Henderson
2021-06-04 20:12 ` [PULL 10/15] tcg/arm: Implement TCG_TARGET_HAS_sat_vec Richard Henderson
2021-06-04 20:12 ` [PULL 11/15] tcg/arm: Implement TCG_TARGET_HAS_minmax_vec Richard Henderson
2021-06-04 20:12 ` [PULL 12/15] tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec Richard Henderson
2021-06-04 20:12 ` [PULL 13/15] tcg/arm: Implement TCG_TARGET_HAS_shv_vec Richard Henderson
2021-06-04 20:12 ` [PULL 14/15] tcg/arm: Implement TCG_TARGET_HAS_roti_vec Richard Henderson
2021-06-04 20:12 ` [PULL 15/15] tcg/arm: Implement TCG_TARGET_HAS_rotv_vec Richard Henderson
2021-06-05 15:11 ` [PULL 00/15] tcg patch queue Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210604201210.920136-2-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).