From: Patrick Venture <venture@google.com>
To: hskinnemoen@google.com, kfting@nuvoton.com, clg@kaod.org,
peter.maydell@linaro.org, andrew@aj.id.au, joel@jms.id.au
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
Patrick Venture <venture@google.com>,
Hao Wu <wuhaotsh@google.com>
Subject: [PATCH v2 3/3] hw/arm: quanta-q71l add pca954x muxes
Date: Tue, 8 Jun 2021 13:25:22 -0700 [thread overview]
Message-ID: <20210608202522.2677850-4-venture@google.com> (raw)
In-Reply-To: <20210608202522.2677850-1-venture@google.com>
Adds the pca954x muxes expected.
Tested: Booted quanta-q71l image to userspace.
Signed-off-by: Patrick Venture <venture@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
---
hw/arm/Kconfig | 1 +
hw/arm/aspeed.c | 11 ++++++++---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 9d1c2a6f7b..4a033e81ef 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -413,6 +413,7 @@ config ASPEED_SOC
select PCA9552
select SERIAL
select SMBUS_EEPROM
+ select PCA954X
select SSI
select SSI_M25P80
select TMP105
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 3fe6c55744..35a28b0e8b 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -14,6 +14,7 @@
#include "hw/arm/boot.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/i2c_mux_pca954x.h"
#include "hw/i2c/smbus_eeprom.h"
#include "hw/misc/pca9552.h"
#include "hw/misc/tmp105.h"
@@ -461,14 +462,18 @@ static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
/* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */
/* TODO: Add Memory Riser i2c mux and eeproms. */
- /* TODO: i2c-2: pca9546@74 */
- /* TODO: i2c-2: pca9548@77 */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77);
+
/* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */
- /* TODO: i2c-7: Add pca9546@70 */
+
+ /* i2c-7 */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70);
/* - i2c@0: pmbus@59 */
/* - i2c@1: pmbus@58 */
/* - i2c@2: pmbus@58 */
/* - i2c@3: pmbus@59 */
+
/* TODO: i2c-7: Add PDB FRU eeprom@52 */
/* TODO: i2c-8: Add BMC FRU eeprom@50 */
}
--
2.32.0.rc1.229.g3e70b5a671-goog
next prev parent reply other threads:[~2021-06-08 20:28 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 20:25 [PATCH v2 0/3] With the pca954x i2c mux available, enable it on aspeed and nuvoton BMC boards Patrick Venture
2021-06-08 20:25 ` [PATCH v2 1/3] hw/arm: gsj add i2c comments Patrick Venture
2021-06-08 20:25 ` [PATCH v2 2/3] hw/arm: gsj add pca9548 Patrick Venture
2021-06-08 20:25 ` Patrick Venture [this message]
2021-06-09 4:51 ` [PATCH v2 3/3] hw/arm: quanta-q71l add pca954x muxes Cédric Le Goater
2021-06-15 14:06 ` [PATCH v2 0/3] With the pca954x i2c mux available, enable it on aspeed and nuvoton BMC boards Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210608202522.2677850-4-venture@google.com \
--to=venture@google.com \
--cc=andrew@aj.id.au \
--cc=clg@kaod.org \
--cc=hskinnemoen@google.com \
--cc=joel@jms.id.au \
--cc=kfting@nuvoton.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=wuhaotsh@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).