From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Luis Pires" <luis.pires@eldorado.org.br>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: [PULL 26/34] tcg: Round the tb_size default from qemu_get_host_physmem
Date: Fri, 11 Jun 2021 16:41:36 -0700 [thread overview]
Message-ID: <20210611234144.653682-27-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org>
If qemu_get_host_physmem returns an odd number of pages,
then physmem / 8 will not be a multiple of the page size.
The following was observed on a gitlab runner:
ERROR qtest-arm/boot-serial-test - Bail out!
ERROR:../util/osdep.c:80:qemu_mprotect__osdep: \
assertion failed: (!(size & ~qemu_real_host_page_mask))
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/region.c | 47 +++++++++++++++++++++--------------------------
1 file changed, 21 insertions(+), 26 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index 2e541cd2bf..e1790ce1e4 100644
--- a/tcg/region.c
+++ b/tcg/region.c
@@ -470,26 +470,6 @@ static size_t tcg_n_regions(size_t tb_size, unsigned max_cpus)
(DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \
? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE)
-static size_t size_code_gen_buffer(size_t tb_size)
-{
- /* Size the buffer. */
- if (tb_size == 0) {
- size_t phys_mem = qemu_get_host_physmem();
- if (phys_mem == 0) {
- tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE;
- } else {
- tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8);
- }
- }
- if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) {
- tb_size = MIN_CODE_GEN_BUFFER_SIZE;
- }
- if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) {
- tb_size = MAX_CODE_GEN_BUFFER_SIZE;
- }
- return tb_size;
-}
-
#ifdef __mips__
/*
* In order to use J and JAL within the code_gen_buffer, we require
@@ -841,13 +821,29 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp)
*/
void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
{
- size_t page_size;
+ const size_t page_size = qemu_real_host_page_size;
size_t region_size;
size_t i;
int have_prot;
- have_prot = alloc_code_gen_buffer(size_code_gen_buffer(tb_size),
- splitwx, &error_fatal);
+ /* Size the buffer. */
+ if (tb_size == 0) {
+ size_t phys_mem = qemu_get_host_physmem();
+ if (phys_mem == 0) {
+ tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE;
+ } else {
+ tb_size = QEMU_ALIGN_DOWN(phys_mem / 8, page_size);
+ tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, tb_size);
+ }
+ }
+ if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) {
+ tb_size = MIN_CODE_GEN_BUFFER_SIZE;
+ }
+ if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) {
+ tb_size = MAX_CODE_GEN_BUFFER_SIZE;
+ }
+
+ have_prot = alloc_code_gen_buffer(tb_size, splitwx, &error_fatal);
assert(have_prot >= 0);
/* Request large pages for the buffer and the splitwx. */
@@ -862,9 +858,8 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
* As a result of this we might end up with a few extra pages at the end of
* the buffer; we will assign those to the last region.
*/
- region.n = tcg_n_regions(region.total_size, max_cpus);
- page_size = qemu_real_host_page_size;
- region_size = region.total_size / region.n;
+ region.n = tcg_n_regions(tb_size, max_cpus);
+ region_size = tb_size / region.n;
region_size = QEMU_ALIGN_DOWN(region_size, page_size);
/* A region must have at least 2 pages; one code, one guard */
--
2.25.1
next prev parent reply other threads:[~2021-06-12 0:00 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-11 23:41 [PULL 00/34] tcg patch queue Richard Henderson
2021-06-11 23:41 ` [PULL 01/34] meson: Split out tcg/meson.build Richard Henderson
2021-06-11 23:41 ` [PULL 02/34] meson: Split out fpu/meson.build Richard Henderson
2021-06-11 23:41 ` [PULL 03/34] tcg: Re-order tcg_region_init vs tcg_prologue_init Richard Henderson
2021-06-14 14:36 ` Christian Borntraeger
2021-06-11 23:41 ` [PULL 04/34] tcg: Remove error return from tcg_region_initial_alloc__locked Richard Henderson
2021-06-11 23:41 ` [PULL 05/34] tcg: Split out tcg_region_initial_alloc Richard Henderson
2021-06-11 23:41 ` [PULL 06/34] tcg: Split out tcg_region_prologue_set Richard Henderson
2021-06-11 23:41 ` [PULL 07/34] tcg: Split out region.c Richard Henderson
2021-06-11 23:41 ` [PULL 08/34] accel/tcg: Inline cpu_gen_init Richard Henderson
2021-06-11 23:41 ` [PULL 09/34] accel/tcg: Move alloc_code_gen_buffer to tcg/region.c Richard Henderson
2021-06-11 23:41 ` [PULL 10/34] accel/tcg: Rename tcg_init to tcg_init_machine Richard Henderson
2021-06-11 23:41 ` [PULL 11/34] tcg: Create tcg_init Richard Henderson
2021-06-11 23:41 ` [PULL 12/34] accel/tcg: Merge tcg_exec_init into tcg_init_machine Richard Henderson
2021-06-11 23:41 ` [PULL 13/34] accel/tcg: Use MiB in tcg_init_machine Richard Henderson
2021-06-11 23:41 ` [PULL 14/34] accel/tcg: Pass down max_cpus to tcg_init Richard Henderson
2021-06-11 23:41 ` [PULL 15/34] tcg: Introduce tcg_max_ctxs Richard Henderson
2021-06-11 23:41 ` [PULL 16/34] tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h Richard Henderson
2021-06-11 23:41 ` [PULL 17/34] tcg: Replace region.end with region.total_size Richard Henderson
2021-06-11 23:41 ` [PULL 18/34] tcg: Rename region.start to region.after_prologue Richard Henderson
2021-06-11 23:41 ` [PULL 19/34] tcg: Tidy tcg_n_regions Richard Henderson
2021-06-11 23:41 ` [PULL 20/34] tcg: Tidy split_cross_256mb Richard Henderson
2021-06-11 23:41 ` [PULL 21/34] tcg: Move in_code_gen_buffer and tests to region.c Richard Henderson
2021-06-11 23:41 ` [PULL 22/34] tcg: Allocate code_gen_buffer into struct tcg_region_state Richard Henderson
2021-06-11 23:41 ` [PULL 23/34] tcg: Return the map protection from alloc_code_gen_buffer Richard Henderson
2021-06-11 23:41 ` [PULL 24/34] tcg: Sink qemu_madvise call to common code Richard Henderson
2021-06-11 23:41 ` [PULL 25/34] util/osdep: Add qemu_mprotect_rw Richard Henderson
2021-06-11 23:41 ` Richard Henderson [this message]
2021-06-11 23:41 ` [PULL 27/34] tcg: Merge buffer protection and guard page protection Richard Henderson
2021-06-11 23:41 ` [PULL 28/34] tcg: When allocating for !splitwx, begin with PROT_NONE Richard Henderson
2021-06-11 23:41 ` [PULL 29/34] tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/ Richard Henderson
2021-06-11 23:41 ` [PULL 30/34] tcg: Introduce tcg_remove_ops_after Richard Henderson
2021-06-11 23:41 ` [PULL 31/34] tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_* Richard Henderson
2021-06-11 23:41 ` [PULL 32/34] tcg/arm: Fix tcg_out_op function signature Richard Henderson
2021-06-11 23:41 ` [PULL 33/34] softfloat: Fix tp init in float32_exp2 Richard Henderson
2021-06-11 23:41 ` [PULL 34/34] docs/devel: Explain in more detail the TB chaining mechanisms Richard Henderson
2021-06-13 15:13 ` [PULL 00/34] tcg patch queue Peter Maydell
2021-06-13 17:10 ` Peter Maydell
2021-06-14 1:37 ` Richard Henderson
2021-06-14 9:28 ` Peter Maydell
2021-06-14 9:35 ` Alex Bennée
2021-06-14 15:00 ` Philippe Mathieu-Daudé
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