From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH 04/28] tcg/arm: Support bswap flags
Date: Mon, 14 Jun 2021 01:37:36 -0700 [thread overview]
Message-ID: <20210614083800.1166166-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210614083800.1166166-1-richard.henderson@linaro.org>
Combine the three bswap16 routines, and differentiate via the flags.
Use the correct flags combination from the load/store routines, and
pass along the constant parameter from tcg_out_op.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target.c.inc | 78 ++++++++++++++++++++--------------------
1 file changed, 38 insertions(+), 40 deletions(-)
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 5157143246..9824e215be 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -1013,50 +1013,44 @@ static inline void tcg_out_ext16u(TCGContext *s, int cond,
}
}
-static inline void tcg_out_bswap16s(TCGContext *s, int cond, int rd, int rn)
+static void tcg_out_bswap16(TCGContext *s, int cond, int rd, int rn, int flags)
{
if (use_armv6_instructions) {
- /* revsh */
- tcg_out32(s, 0x06ff0fb0 | (cond << 28) | (rd << 12) | rn);
- } else {
- tcg_out_dat_reg(s, cond, ARITH_MOV,
- TCG_REG_TMP, 0, rn, SHIFT_IMM_LSL(24));
- tcg_out_dat_reg(s, cond, ARITH_MOV,
- TCG_REG_TMP, 0, TCG_REG_TMP, SHIFT_IMM_ASR(16));
- tcg_out_dat_reg(s, cond, ARITH_ORR,
- rd, TCG_REG_TMP, rn, SHIFT_IMM_LSR(8));
- }
-}
+ if (flags & TCG_BSWAP_OS) {
+ /* revsh */
+ tcg_out32(s, 0x06ff0fb0 | (cond << 28) | (rd << 12) | rn);
+ return;
+ }
-static inline void tcg_out_bswap16(TCGContext *s, int cond, int rd, int rn)
-{
- if (use_armv6_instructions) {
/* rev16 */
tcg_out32(s, 0x06bf0fb0 | (cond << 28) | (rd << 12) | rn);
- } else {
- tcg_out_dat_reg(s, cond, ARITH_MOV,
- TCG_REG_TMP, 0, rn, SHIFT_IMM_LSL(24));
- tcg_out_dat_reg(s, cond, ARITH_MOV,
- TCG_REG_TMP, 0, TCG_REG_TMP, SHIFT_IMM_LSR(16));
- tcg_out_dat_reg(s, cond, ARITH_ORR,
- rd, TCG_REG_TMP, rn, SHIFT_IMM_LSR(8));
+ if ((flags & (TCG_BSWAP_IZ | TCG_BSWAP_OZ)) == TCG_BSWAP_OZ) {
+ /* uxth */
+ tcg_out32(s, 0x06ff0070 | (cond << 28) | (rd << 12) | rd);
+ }
+ return;
}
-}
-/* swap the two low bytes assuming that the two high input bytes and the
- two high output bit can hold any value. */
-static inline void tcg_out_bswap16st(TCGContext *s, int cond, int rd, int rn)
-{
- if (use_armv6_instructions) {
- /* rev16 */
- tcg_out32(s, 0x06bf0fb0 | (cond << 28) | (rd << 12) | rn);
- } else {
- tcg_out_dat_reg(s, cond, ARITH_MOV,
- TCG_REG_TMP, 0, rn, SHIFT_IMM_LSR(8));
+ /* Move the high byte down and isolate it. */
+ /* rn=xxAB -> tmp=0xxA -> tmp=000A */
+ tcg_out_dat_reg(s, cond, ARITH_MOV, TCG_REG_TMP, 0, rn, SHIFT_IMM_LSR(8));
+ if (!(flags & TCG_BSWAP_IZ)) {
tcg_out_dat_imm(s, cond, ARITH_AND, TCG_REG_TMP, TCG_REG_TMP, 0xff);
+ }
+
+ /* Move the low byte up and extend it. */
+ if (!(flags & (TCG_BSWAP_OS | TCG_BSWAP_OZ))) {
+ /* No output extension: rd=xABA */
tcg_out_dat_reg(s, cond, ARITH_ORR,
rd, TCG_REG_TMP, rn, SHIFT_IMM_LSL(8));
+ return;
}
+
+ /* rn=xxAB -> rd=B000 -> rd=ssBA */
+ tcg_out_dat_reg(s, cond, ARITH_MOV, rd, 0, rn, SHIFT_IMM_LSL(24));
+ tcg_out_dat_reg(s, cond, ARITH_ORR, rd, TCG_REG_TMP, rd,
+ flags & TCG_BSWAP_OS
+ ? SHIFT_IMM_ASR(16) : SHIFT_IMM_LSR(16));
}
static inline void tcg_out_bswap32(TCGContext *s, int cond, int rd, int rn)
@@ -1705,13 +1699,15 @@ static inline void tcg_out_qemu_ld_index(TCGContext *s, MemOp opc,
case MO_UW:
tcg_out_ld16u_r(s, COND_AL, datalo, addrlo, addend);
if (bswap) {
- tcg_out_bswap16(s, COND_AL, datalo, datalo);
+ tcg_out_bswap16(s, COND_AL, datalo, datalo,
+ TCG_BSWAP_IZ | TCG_BSWAP_OZ);
}
break;
case MO_SW:
if (bswap) {
tcg_out_ld16u_r(s, COND_AL, datalo, addrlo, addend);
- tcg_out_bswap16s(s, COND_AL, datalo, datalo);
+ tcg_out_bswap16(s, COND_AL, datalo, datalo,
+ TCG_BSWAP_IZ | TCG_BSWAP_OS);
} else {
tcg_out_ld16s_r(s, COND_AL, datalo, addrlo, addend);
}
@@ -1766,13 +1762,15 @@ static inline void tcg_out_qemu_ld_direct(TCGContext *s, MemOp opc,
case MO_UW:
tcg_out_ld16u_8(s, COND_AL, datalo, addrlo, 0);
if (bswap) {
- tcg_out_bswap16(s, COND_AL, datalo, datalo);
+ tcg_out_bswap16(s, COND_AL, datalo, datalo,
+ TCG_BSWAP_IZ | TCG_BSWAP_OZ);
}
break;
case MO_SW:
if (bswap) {
tcg_out_ld16u_8(s, COND_AL, datalo, addrlo, 0);
- tcg_out_bswap16s(s, COND_AL, datalo, datalo);
+ tcg_out_bswap16(s, COND_AL, datalo, datalo,
+ TCG_BSWAP_IZ | TCG_BSWAP_OS);
} else {
tcg_out_ld16s_8(s, COND_AL, datalo, addrlo, 0);
}
@@ -1862,7 +1860,7 @@ static inline void tcg_out_qemu_st_index(TCGContext *s, int cond, MemOp opc,
break;
case MO_16:
if (bswap) {
- tcg_out_bswap16st(s, cond, TCG_REG_R0, datalo);
+ tcg_out_bswap16(s, cond, TCG_REG_R0, datalo, 0);
tcg_out_st16_r(s, cond, TCG_REG_R0, addrlo, addend);
} else {
tcg_out_st16_r(s, cond, datalo, addrlo, addend);
@@ -1907,7 +1905,7 @@ static inline void tcg_out_qemu_st_direct(TCGContext *s, MemOp opc,
break;
case MO_16:
if (bswap) {
- tcg_out_bswap16st(s, COND_AL, TCG_REG_R0, datalo);
+ tcg_out_bswap16(s, COND_AL, TCG_REG_R0, datalo, 0);
tcg_out_st16_8(s, COND_AL, TCG_REG_R0, addrlo, 0);
} else {
tcg_out_st16_8(s, COND_AL, datalo, addrlo, 0);
@@ -2245,7 +2243,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_bswap16_i32:
- tcg_out_bswap16(s, COND_AL, args[0], args[1]);
+ tcg_out_bswap16(s, COND_AL, args[0], args[1], args[2]);
break;
case INDEX_op_bswap32_i32:
tcg_out_bswap32(s, COND_AL, args[0], args[1]);
--
2.25.1
next prev parent reply other threads:[~2021-06-14 8:48 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-14 8:37 [PATCH 00/28] tcg: bswap improvements Richard Henderson
2021-06-14 8:37 ` [PATCH 01/28] tcg: Add flags argument to bswap opcodes Richard Henderson
2021-06-14 9:19 ` Philippe Mathieu-Daudé
2021-06-14 11:49 ` Alex Bennée
2021-06-14 14:43 ` Richard Henderson
2021-06-21 13:41 ` Peter Maydell
2021-06-21 13:51 ` Peter Maydell
2021-06-21 14:02 ` Richard Henderson
2021-06-21 14:15 ` Peter Maydell
2021-06-21 13:59 ` Richard Henderson
2021-06-14 8:37 ` [PATCH 02/28] tcg/i386: Support bswap flags Richard Henderson
2021-06-21 13:53 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 03/28] tcg/aarch64: " Richard Henderson
2021-06-21 14:01 ` Peter Maydell
2021-06-21 14:04 ` Richard Henderson
2021-06-21 18:12 ` Richard Henderson
2021-06-21 19:40 ` Peter Maydell
2021-06-21 19:50 ` Richard Henderson
2021-06-21 19:52 ` Peter Maydell
2021-06-14 8:37 ` Richard Henderson [this message]
2021-06-21 14:09 ` [PATCH 04/28] tcg/arm: " Peter Maydell
2021-06-14 8:37 ` [PATCH 05/28] tcg/ppc: Split out tcg_out_ext{8,16,32}s Richard Henderson
2021-06-21 14:18 ` Peter Maydell
2021-06-21 20:44 ` Philippe Mathieu-Daudé
2021-06-14 8:37 ` [PATCH 06/28] tcg/ppc: Split out tcg_out_sari{32,64} Richard Henderson
2021-06-21 14:22 ` Peter Maydell
2021-06-21 14:23 ` Richard Henderson
2021-06-14 8:37 ` [PATCH 07/28] tcg/ppc: Split out tcg_out_bswap16 Richard Henderson
2021-06-21 14:29 ` Peter Maydell
2021-06-21 14:41 ` Richard Henderson
2021-06-14 8:37 ` [PATCH 08/28] tcg/ppc: Split out tcg_out_bswap32 Richard Henderson
2021-06-21 14:30 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 09/28] tcg/ppc: Split out tcg_out_bswap64 Richard Henderson
2021-06-21 14:35 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 10/28] tcg/ppc: Support bswap flags Richard Henderson
2021-06-21 14:38 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 11/28] tcg/ppc: Use power10 byte-reverse instructions Richard Henderson
2021-06-14 8:37 ` [PATCH 12/28] tcg/s390: Support bswap flags Richard Henderson
2021-06-14 8:37 ` [PATCH 13/28] tcg/mips: Support bswap flags in tcg_out_bswap16 Richard Henderson
2021-06-22 6:36 ` Philippe Mathieu-Daudé
2021-06-22 13:54 ` Richard Henderson
2021-06-14 8:37 ` [PATCH 14/28] tcg/mips: Support bswap flags in tcg_out_bswap32 Richard Henderson
2021-06-14 9:31 ` Philippe Mathieu-Daudé
2021-06-14 15:49 ` Richard Henderson
2021-06-14 8:37 ` [PATCH 15/28] tcg/tci: Support bswap flags Richard Henderson
2021-06-14 9:33 ` Philippe Mathieu-Daudé
2021-06-14 8:37 ` [PATCH 16/28] tcg: Handle new bswap flags during optimize Richard Henderson
2021-06-21 14:47 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 17/28] tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64 Richard Henderson
2021-06-14 9:41 ` Philippe Mathieu-Daudé
2021-06-14 15:58 ` Richard Henderson
2021-06-22 10:20 ` Philippe Mathieu-Daudé
2021-06-22 13:56 ` Richard Henderson
2021-06-21 15:01 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 18/28] tcg: Make use of bswap flags in tcg_gen_qemu_ld_* Richard Henderson
2021-06-21 15:04 ` Peter Maydell
2021-06-22 6:41 ` Philippe Mathieu-Daudé
2021-06-14 8:37 ` [PATCH 19/28] tcg: Make use of bswap flags in tcg_gen_qemu_st_* Richard Henderson
2021-06-21 15:05 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 20/28] target/arm: Improve REV32 Richard Henderson
2021-06-14 9:08 ` Philippe Mathieu-Daudé
2021-06-21 15:08 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 21/28] target/arm: Improve vector REV Richard Henderson
2021-06-21 15:10 ` Peter Maydell
2021-06-22 6:44 ` Philippe Mathieu-Daudé
2021-06-14 8:37 ` [PATCH 22/28] target/arm: Improve REVSH Richard Henderson
2021-06-14 9:42 ` Philippe Mathieu-Daudé
2021-06-21 15:11 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 23/28] target/i386: Improve bswap translation Richard Henderson
2021-06-21 15:15 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 24/28] target/sh4: Improve swap.b translation Richard Henderson
2021-06-21 15:16 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 25/28] target/mips: Fix gen_mxu_s32ldd_s32lddr Richard Henderson
2021-06-21 20:59 ` Philippe Mathieu-Daudé
2021-06-14 8:37 ` [PATCH 26/28] tcg/arm: Unset TCG_TARGET_HAS_MEMORY_BSWAP Richard Henderson
2021-06-21 15:31 ` Peter Maydell
2021-06-14 8:37 ` [PATCH 27/28] tcg/aarch64: " Richard Henderson
2021-06-21 15:33 ` Peter Maydell
2021-06-14 8:38 ` [PATCH 28/28] tcg/riscv: Remove MO_BSWAP handling Richard Henderson
2021-06-18 6:30 ` Alistair Francis
2021-06-14 22:41 ` [PATCH 00/28] tcg: bswap improvements no-reply
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