From: Cornelia Huck <cohuck@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-s390x@nongnu.org, Cornelia Huck <cohuck@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, David Hildenbrand <david@redhat.com>
Subject: [PULL 15/37] s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT)
Date: Mon, 21 Jun 2021 11:58:20 +0200 [thread overview]
Message-ID: <20210621095842.335162-16-cohuck@redhat.com> (raw)
In-Reply-To: <20210621095842.335162-1-cohuck@redhat.com>
From: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20210608092337.12221-15-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
target/s390x/helper.h | 4 ++
target/s390x/translate_vx.c.inc | 74 ++++++++++++++++++++++++++-------
target/s390x/vec_fpu_helper.c | 46 +++++++++++++++++++-
3 files changed, 109 insertions(+), 15 deletions(-)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 2d5e382e6136..28797a6ccc11 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -265,7 +265,9 @@ DEF_HELPER_FLAGS_4(gvec_vclgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfd32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfd64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfd128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_4(gvec_vfi32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfi64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
+DEF_HELPER_FLAGS_4(gvec_vfi128, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfm32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
@@ -273,7 +275,9 @@ DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfm128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_6(gvec_vfma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_4(gvec_vfsq32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
+DEF_HELPER_FLAGS_4(gvec_vfsq128, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfs32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfs64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfs128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc
index 0fbd914b408f..6241279e68fb 100644
--- a/target/s390x/translate_vx.c.inc
+++ b/target/s390x/translate_vx.c.inc
@@ -2654,35 +2654,63 @@ static DisasJumpType op_vcdg(DisasContext *s, DisasOps *o)
const uint8_t fpf = get_field(s, m3);
const uint8_t m4 = get_field(s, m4);
const uint8_t erm = get_field(s, m5);
- gen_helper_gvec_2_ptr *fn;
+ gen_helper_gvec_2_ptr *fn = NULL;
- if (fpf != FPF_LONG || extract32(m4, 0, 2) || erm > 7 || erm == 2) {
- gen_program_exception(s, PGM_SPECIFICATION);
- return DISAS_NORETURN;
- }
switch (s->fields.op2) {
case 0xc3:
- fn = gen_helper_gvec_vcdg64;
+ if (fpf == FPF_LONG) {
+ fn = gen_helper_gvec_vcdg64;
+ }
break;
case 0xc1:
- fn = gen_helper_gvec_vcdlg64;
+ if (fpf == FPF_LONG) {
+ fn = gen_helper_gvec_vcdlg64;
+ }
break;
case 0xc2:
- fn = gen_helper_gvec_vcgd64;
+ if (fpf == FPF_LONG) {
+ fn = gen_helper_gvec_vcgd64;
+ }
break;
case 0xc0:
- fn = gen_helper_gvec_vclgd64;
+ if (fpf == FPF_LONG) {
+ fn = gen_helper_gvec_vclgd64;
+ }
break;
case 0xc7:
- fn = gen_helper_gvec_vfi64;
+ switch (fpf) {
+ case FPF_SHORT:
+ if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+ fn = gen_helper_gvec_vfi32;
+ }
+ break;
+ case FPF_LONG:
+ fn = gen_helper_gvec_vfi64;
+ break;
+ case FPF_EXT:
+ if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+ fn = gen_helper_gvec_vfi128;
+ }
+ break;
+ default:
+ break;
+ }
break;
case 0xc5:
- fn = gen_helper_gvec_vflr64;
+ if (fpf == FPF_LONG) {
+ fn = gen_helper_gvec_vflr64;
+ }
break;
default:
g_assert_not_reached();
}
+
+ if (!fn || extract32(m4, 0, 2) || erm > 7 || erm == 2) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+
gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env,
deposit32(m4, 4, 4, erm), fn);
return DISAS_NEXT;
@@ -2780,14 +2808,32 @@ static DisasJumpType op_vfsq(DisasContext *s, DisasOps *o)
{
const uint8_t fpf = get_field(s, m3);
const uint8_t m4 = get_field(s, m4);
+ gen_helper_gvec_2_ptr *fn = NULL;
+
+ switch (fpf) {
+ case FPF_SHORT:
+ if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+ fn = gen_helper_gvec_vfsq32;
+ }
+ break;
+ case FPF_LONG:
+ fn = gen_helper_gvec_vfsq64;
+ break;
+ case FPF_EXT:
+ if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+ fn = gen_helper_gvec_vfsq128;
+ }
+ break;
+ default:
+ break;
+ }
- if (fpf != FPF_LONG || extract32(m4, 0, 3)) {
+ if (!fn || extract32(m4, 0, 3)) {
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
- gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, m4,
- gen_helper_gvec_vfsq64);
+ gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, m4, fn);
return DISAS_NEXT;
}
diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
index 3484c161ba88..1df8f3d5a33d 100644
--- a/target/s390x/vec_fpu_helper.c
+++ b/target/s390x/vec_fpu_helper.c
@@ -110,6 +110,30 @@ static void s390_vec_write_float128(S390Vector *v, float128 data)
s390_vec_write_element64(v, 1, data.low);
}
+typedef float32 (*vop32_2_fn)(float32 a, float_status *s);
+static void vop32_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
+ bool s, bool XxC, uint8_t erm, vop32_2_fn fn,
+ uintptr_t retaddr)
+{
+ uint8_t vxc, vec_exc = 0;
+ S390Vector tmp = {};
+ int i, old_mode;
+
+ old_mode = s390_swap_bfp_rounding_mode(env, erm);
+ for (i = 0; i < 4; i++) {
+ const float32 a = s390_vec_read_float32(v2, i);
+
+ s390_vec_write_float32(&tmp, i, fn(a, &env->fpu_status));
+ vxc = check_ieee_exc(env, i, XxC, &vec_exc);
+ if (s || vxc) {
+ break;
+ }
+ }
+ s390_restore_bfp_rounding_mode(env, old_mode);
+ handle_ieee_exc(env, vxc, vec_exc, retaddr);
+ *v1 = tmp;
+}
+
typedef float64 (*vop64_2_fn)(float64 a, float_status *s);
static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
bool s, bool XxC, uint8_t erm, vop64_2_fn fn,
@@ -134,6 +158,24 @@ static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
*v1 = tmp;
}
+typedef float128 (*vop128_2_fn)(float128 a, float_status *s);
+static void vop128_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
+ bool s, bool XxC, uint8_t erm, vop128_2_fn fn,
+ uintptr_t retaddr)
+{
+ const float128 a = s390_vec_read_float128(v2);
+ uint8_t vxc, vec_exc = 0;
+ S390Vector tmp = {};
+ int old_mode;
+
+ old_mode = s390_swap_bfp_rounding_mode(env, erm);
+ s390_vec_write_float128(&tmp, fn(a, &env->fpu_status));
+ vxc = check_ieee_exc(env, 0, XxC, &vec_exc);
+ s390_restore_bfp_rounding_mode(env, old_mode);
+ handle_ieee_exc(env, vxc, vec_exc, retaddr);
+ *v1 = tmp;
+}
+
static float64 vcdg64(float64 a, float_status *s)
{
return int64_to_float64(a, s);
@@ -173,7 +215,9 @@ void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, CPUS390XState *env, \
DEF_GVEC_VOP2_FN(NAME, NAME##64, 64)
#define DEF_GVEC_VOP2(NAME, OP) \
-DEF_GVEC_VOP2_FN(NAME, float64_##OP, 64)
+DEF_GVEC_VOP2_FN(NAME, float32_##OP, 32) \
+DEF_GVEC_VOP2_FN(NAME, float64_##OP, 64) \
+DEF_GVEC_VOP2_FN(NAME, float128_##OP, 128)
DEF_GVEC_VOP2_64(vcdg)
DEF_GVEC_VOP2_64(vcdlg)
--
2.31.1
next prev parent reply other threads:[~2021-06-21 10:10 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 9:58 [PULL 00/37] s390x update Cornelia Huck
2021-06-21 9:58 ` [PULL 01/37] s390x/kvm: remove unused gs handling Cornelia Huck
2021-06-21 9:58 ` [PULL 02/37] s390x/tcg: Fix FP CONVERT TO (LOGICAL) FIXED NaN handling Cornelia Huck
2021-06-21 9:58 ` [PULL 03/37] s390x/tcg: Fix instruction name for VECTOR FP LOAD (LENGTHENED|ROUNDED) Cornelia Huck
2021-06-21 9:58 ` [PULL 04/37] s390x/tcg: Simplify vop64_3() handling Cornelia Huck
2021-06-21 9:58 ` [PULL 05/37] s390x/tcg: Simplify vop64_2() handling Cornelia Huck
2021-06-21 9:58 ` [PULL 06/37] s390x/tcg: Simplify vfc64() handling Cornelia Huck
2021-06-21 9:58 ` [PULL 07/37] s390x/tcg: Simplify vftci64() handling Cornelia Huck
2021-06-21 9:58 ` [PULL 08/37] s390x/tcg: Simplify vfma64() handling Cornelia Huck
2021-06-21 9:58 ` [PULL 09/37] s390x/tcg: Simplify vfll32() handling Cornelia Huck
2021-06-21 9:58 ` [PULL 10/37] s390x/tcg: Simplify vflr64() handling Cornelia Huck
2021-06-21 9:58 ` [PULL 11/37] s390x/tcg: Simplify wfc64() handling Cornelia Huck
2021-06-21 9:58 ` [PULL 12/37] s390x/tcg: Implement VECTOR BIT PERMUTE Cornelia Huck
2021-06-21 9:58 ` [PULL 13/37] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL Cornelia Huck
2021-06-21 9:58 ` [PULL 14/37] s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT) Cornelia Huck
2021-06-21 9:58 ` Cornelia Huck [this message]
2021-06-21 9:58 ` [PULL 16/37] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE * Cornelia Huck
2021-06-21 9:58 ` [PULL 17/37] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR Cornelia Huck
2021-06-21 9:58 ` [PULL 18/37] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED Cornelia Huck
2021-06-21 9:58 ` [PULL 19/37] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED Cornelia Huck
2021-06-21 9:58 ` [PULL 20/37] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION Cornelia Huck
2021-06-21 9:58 ` [PULL 21/37] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE Cornelia Huck
2021-06-21 9:58 ` [PULL 22/37] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) Cornelia Huck
2021-06-21 9:58 ` [PULL 23/37] s390x/tcg: Implement VECTOR FP NEGATIVE " Cornelia Huck
2021-06-21 9:58 ` [PULL 24/37] s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) Cornelia Huck
2021-06-21 9:58 ` [PULL 25/37] linux-user: elf: s390x: Prepare for Vector enhancements facility Cornelia Huck
2021-06-21 9:58 ` [PULL 26/37] s390x/tcg: We support " Cornelia Huck
2021-06-21 9:58 ` [PULL 27/37] s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 Cornelia Huck
2021-06-21 9:58 ` [PULL 28/37] configure: Check whether we can compile the s390-ccw bios with -msoft-float Cornelia Huck
2021-06-21 9:58 ` [PULL 29/37] target/s390x: Expose load_psw and get_psw_mask to cpu.h Cornelia Huck
2021-06-21 9:58 ` [PULL 30/37] target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask Cornelia Huck
2021-06-21 9:58 ` [PULL 31/37] target/s390x: Improve s390_cpu_dump_state vs cc_op Cornelia Huck
2021-06-21 9:58 ` [PULL 32/37] target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub Cornelia Huck
2021-06-21 9:58 ` [PULL 33/37] linux-user/s390x: Save and restore psw.mask properly Cornelia Huck
2021-06-21 9:58 ` [PULL 34/37] s390x/css: Introduce an ESW struct Cornelia Huck
2021-06-21 9:58 ` [PULL 35/37] s390x/css: Split out the IRB sense data Cornelia Huck
2021-06-21 9:58 ` [PULL 36/37] s390x/css: Refactor IRB construction Cornelia Huck
2021-06-21 9:58 ` [PULL 37/37] s390x/css: Add passthrough IRB Cornelia Huck
2021-06-21 10:39 ` [PULL 00/37] s390x update no-reply
2021-06-22 15:07 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210621095842.335162-16-cohuck@redhat.com \
--to=cohuck@redhat.com \
--cc=david@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-s390x@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).