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From: Cornelia Huck <cohuck@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-s390x@nongnu.org, Cornelia Huck <cohuck@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	qemu-devel@nongnu.org, David Hildenbrand <david@redhat.com>
Subject: [PULL 08/37] s390x/tcg: Simplify vfma64() handling
Date: Mon, 21 Jun 2021 11:58:13 +0200	[thread overview]
Message-ID: <20210621095842.335162-9-cohuck@redhat.com> (raw)
In-Reply-To: <20210621095842.335162-1-cohuck@redhat.com>

From: David Hildenbrand <david@redhat.com>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20210608092337.12221-8-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
 target/s390x/helper.h           |  2 --
 target/s390x/translate_vx.c.inc |  8 +++----
 target/s390x/vec_fpu_helper.c   | 42 +++++++++++++--------------------
 3 files changed, 20 insertions(+), 32 deletions(-)

diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index e83268023635..3c8759355384 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -267,9 +267,7 @@ DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vflr64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
 DEF_HELPER_FLAGS_6(gvec_vfma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
-DEF_HELPER_FLAGS_6(gvec_vfma64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
 DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
-DEF_HELPER_FLAGS_6(gvec_vfms64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_5(gvec_vfs64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
 DEF_HELPER_4(gvec_vftci64, void, ptr, cptr, env, i32)
diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc
index 1404471881ee..4b5bf0a7e3cb 100644
--- a/target/s390x/translate_vx.c.inc
+++ b/target/s390x/translate_vx.c.inc
@@ -2589,7 +2589,6 @@ static DisasJumpType op_vfma(DisasContext *s, DisasOps *o)
 {
     const uint8_t m5 = get_field(s, m5);
     const uint8_t fpf = get_field(s, m6);
-    const bool se = extract32(m5, 3, 1);
     gen_helper_gvec_4_ptr *fn;
 
     if (fpf != FPF_LONG || extract32(m5, 0, 3)) {
@@ -2598,13 +2597,12 @@ static DisasJumpType op_vfma(DisasContext *s, DisasOps *o)
     }
 
     if (s->fields.op2 == 0x8f) {
-        fn = se ? gen_helper_gvec_vfma64s : gen_helper_gvec_vfma64;
+        fn = gen_helper_gvec_vfma64;
     } else {
-        fn = se ? gen_helper_gvec_vfms64s : gen_helper_gvec_vfms64;
+        fn = gen_helper_gvec_vfms64;
     }
     gen_gvec_4_ptr(get_field(s, v1), get_field(s, v2),
-                   get_field(s, v3), get_field(s, v4), cpu_env,
-                   0, fn);
+                   get_field(s, v3), get_field(s, v4), cpu_env, m5, fn);
     return DISAS_NEXT;
 }
 
diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
index 2ced6fcfaf53..23b38df15886 100644
--- a/target/s390x/vec_fpu_helper.c
+++ b/target/s390x/vec_fpu_helper.c
@@ -374,12 +374,12 @@ static void vfma64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
     int i;
 
     for (i = 0; i < 2; i++) {
-        const uint64_t a = s390_vec_read_element64(v2, i);
-        const uint64_t b = s390_vec_read_element64(v3, i);
-        const uint64_t c = s390_vec_read_element64(v4, i);
-        uint64_t ret = float64_muladd(a, b, c, flags, &env->fpu_status);
+        const float64 a = s390_vec_read_float64(v2, i);
+        const float64 b = s390_vec_read_float64(v3, i);
+        const float64 c = s390_vec_read_float64(v4, i);
+        const float64 ret = float64_muladd(a, b, c, flags, &env->fpu_status);
 
-        s390_vec_write_element64(&tmp, i, ret);
+        s390_vec_write_float64(&tmp, i, ret);
         vxc = check_ieee_exc(env, i, false, &vec_exc);
         if (s || vxc) {
             break;
@@ -389,29 +389,21 @@ static void vfma64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
     *v1 = tmp;
 }
 
-void HELPER(gvec_vfma64)(void *v1, const void *v2, const void *v3,
-                         const void *v4, CPUS390XState *env, uint32_t desc)
-{
-    vfma64(v1, v2, v3, v4, env, false, 0, GETPC());
-}
-
-void HELPER(gvec_vfma64s)(void *v1, const void *v2, const void *v3,
-                         const void *v4, CPUS390XState *env, uint32_t desc)
-{
-    vfma64(v1, v2, v3, v4, env, true, 0, GETPC());
+#define DEF_GVEC_VFMA_B(NAME, FLAGS, BITS)                                     \
+void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3,       \
+                               const void *v4, CPUS390XState *env,             \
+                               uint32_t desc)                                  \
+{                                                                              \
+    const bool se = extract32(simd_data(desc), 3, 1);                          \
+                                                                               \
+    vfma##BITS(v1, v2, v3, v4, env, se, FLAGS, GETPC());                       \
 }
 
-void HELPER(gvec_vfms64)(void *v1, const void *v2, const void *v3,
-                         const void *v4, CPUS390XState *env, uint32_t desc)
-{
-    vfma64(v1, v2, v3, v4, env, false, float_muladd_negate_c, GETPC());
-}
+#define DEF_GVEC_VFMA(NAME, FLAGS)                                             \
+    DEF_GVEC_VFMA_B(NAME, FLAGS, 64)
 
-void HELPER(gvec_vfms64s)(void *v1, const void *v2, const void *v3,
-                         const void *v4, CPUS390XState *env, uint32_t desc)
-{
-    vfma64(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC());
-}
+DEF_GVEC_VFMA(vfma, 0)
+DEF_GVEC_VFMA(vfms, float_muladd_negate_c)
 
 void HELPER(gvec_vftci64)(void *v1, const void *v2, CPUS390XState *env,
                           uint32_t desc)
-- 
2.31.1



  parent reply	other threads:[~2021-06-21 10:13 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-21  9:58 [PULL 00/37] s390x update Cornelia Huck
2021-06-21  9:58 ` [PULL 01/37] s390x/kvm: remove unused gs handling Cornelia Huck
2021-06-21  9:58 ` [PULL 02/37] s390x/tcg: Fix FP CONVERT TO (LOGICAL) FIXED NaN handling Cornelia Huck
2021-06-21  9:58 ` [PULL 03/37] s390x/tcg: Fix instruction name for VECTOR FP LOAD (LENGTHENED|ROUNDED) Cornelia Huck
2021-06-21  9:58 ` [PULL 04/37] s390x/tcg: Simplify vop64_3() handling Cornelia Huck
2021-06-21  9:58 ` [PULL 05/37] s390x/tcg: Simplify vop64_2() handling Cornelia Huck
2021-06-21  9:58 ` [PULL 06/37] s390x/tcg: Simplify vfc64() handling Cornelia Huck
2021-06-21  9:58 ` [PULL 07/37] s390x/tcg: Simplify vftci64() handling Cornelia Huck
2021-06-21  9:58 ` Cornelia Huck [this message]
2021-06-21  9:58 ` [PULL 09/37] s390x/tcg: Simplify vfll32() handling Cornelia Huck
2021-06-21  9:58 ` [PULL 10/37] s390x/tcg: Simplify vflr64() handling Cornelia Huck
2021-06-21  9:58 ` [PULL 11/37] s390x/tcg: Simplify wfc64() handling Cornelia Huck
2021-06-21  9:58 ` [PULL 12/37] s390x/tcg: Implement VECTOR BIT PERMUTE Cornelia Huck
2021-06-21  9:58 ` [PULL 13/37] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL Cornelia Huck
2021-06-21  9:58 ` [PULL 14/37] s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT) Cornelia Huck
2021-06-21  9:58 ` [PULL 15/37] s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT) Cornelia Huck
2021-06-21  9:58 ` [PULL 16/37] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE * Cornelia Huck
2021-06-21  9:58 ` [PULL 17/37] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR Cornelia Huck
2021-06-21  9:58 ` [PULL 18/37] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED Cornelia Huck
2021-06-21  9:58 ` [PULL 19/37] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED Cornelia Huck
2021-06-21  9:58 ` [PULL 20/37] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION Cornelia Huck
2021-06-21  9:58 ` [PULL 21/37] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE Cornelia Huck
2021-06-21  9:58 ` [PULL 22/37] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) Cornelia Huck
2021-06-21  9:58 ` [PULL 23/37] s390x/tcg: Implement VECTOR FP NEGATIVE " Cornelia Huck
2021-06-21  9:58 ` [PULL 24/37] s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) Cornelia Huck
2021-06-21  9:58 ` [PULL 25/37] linux-user: elf: s390x: Prepare for Vector enhancements facility Cornelia Huck
2021-06-21  9:58 ` [PULL 26/37] s390x/tcg: We support " Cornelia Huck
2021-06-21  9:58 ` [PULL 27/37] s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 Cornelia Huck
2021-06-21  9:58 ` [PULL 28/37] configure: Check whether we can compile the s390-ccw bios with -msoft-float Cornelia Huck
2021-06-21  9:58 ` [PULL 29/37] target/s390x: Expose load_psw and get_psw_mask to cpu.h Cornelia Huck
2021-06-21  9:58 ` [PULL 30/37] target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask Cornelia Huck
2021-06-21  9:58 ` [PULL 31/37] target/s390x: Improve s390_cpu_dump_state vs cc_op Cornelia Huck
2021-06-21  9:58 ` [PULL 32/37] target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub Cornelia Huck
2021-06-21  9:58 ` [PULL 33/37] linux-user/s390x: Save and restore psw.mask properly Cornelia Huck
2021-06-21  9:58 ` [PULL 34/37] s390x/css: Introduce an ESW struct Cornelia Huck
2021-06-21  9:58 ` [PULL 35/37] s390x/css: Split out the IRB sense data Cornelia Huck
2021-06-21  9:58 ` [PULL 36/37] s390x/css: Refactor IRB construction Cornelia Huck
2021-06-21  9:58 ` [PULL 37/37] s390x/css: Add passthrough IRB Cornelia Huck
2021-06-21 10:39 ` [PULL 00/37] s390x update no-reply
2021-06-22 15:07 ` Peter Maydell

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