From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aurelien Jarno" <aurelien@aurel32.net>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 05/15] target/mips: Do not abort on invalid instruction
Date: Fri, 25 Jun 2021 11:23:19 +0200 [thread overview]
Message-ID: <20210625092329.1529100-6-f4bug@amsat.org> (raw)
In-Reply-To: <20210625092329.1529100-1-f4bug@amsat.org>
On real hardware an invalid instruction doesn't halt the world,
but usually triggers a RESERVED INSTRUCTION exception.
TCG guest code shouldn't abort QEMU anyway.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210617174323.2900831-2-f4bug@amsat.org>
---
target/mips/tcg/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 3fd0c48d772..4b7229a868a 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -12151,8 +12151,8 @@ static void gen_branch(DisasContext *ctx, int insn_bytes)
tcg_gen_lookup_and_goto_ptr();
break;
default:
- fprintf(stderr, "unknown branch 0x%x\n", proc_hflags);
- abort();
+ LOG_DISAS("unknown branch 0x%x\n", proc_hflags);
+ gen_reserved_instruction(ctx);
}
}
}
--
2.31.1
next prev parent reply other threads:[~2021-06-25 10:09 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-25 9:23 [PULL 00/15] MIPS patches for 2021-06-25 Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 01/15] target/mips: Fix potential integer overflow (CID 1452921) Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 02/15] target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn() Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 03/15] target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insn Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 04/15] target/mips: Raise exception when DINSV opcode used with DSP disabled Philippe Mathieu-Daudé
2021-06-25 9:23 ` Philippe Mathieu-Daudé [this message]
2021-06-25 9:23 ` [PULL 06/15] target/mips: Move TCG trace events to tcg/ sub directory Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 07/15] target/mips: Move translate.h " Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 08/15] target/mips: Restrict some system specific declarations to sysemu Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 09/15] target/mips: Remove SmartMIPS / MDMX unuseful comments Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 10/15] target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful cases Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 11/15] target/mips: fix emulation of nanoMIPS BPOSGE32 instruction Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 12/15] target/mips: Constify host_to_mips_errno[] Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 13/15] target/mips: Optimize regnames[] arrays Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 14/15] target/mips: Remove pointless gen_msa() Philippe Mathieu-Daudé
2021-06-25 9:23 ` [PULL 15/15] target/mips: Merge msa32/msa64 decodetree definitions Philippe Mathieu-Daudé
2021-06-28 13:00 ` [PULL 00/15] MIPS patches for 2021-06-25 Peter Maydell
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