From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v3 28/29] tcg/aarch64: Unset TCG_TARGET_HAS_MEMORY_BSWAP
Date: Fri, 25 Jun 2021 23:36:30 -0700 [thread overview]
Message-ID: <20210626063631.2411938-29-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210626063631.2411938-1-richard.henderson@linaro.org>
The memory bswap support in the aarch64 backend merely dates from
a time when it was required. There is nothing special about the
backend support that could not have been provided by the middle-end
even prior to the introduction of the bswap flags.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch64/tcg-target.c.inc | 87 +++++++++++++-----------------------
2 files changed, 32 insertions(+), 57 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index ef55f7c185..551baf8da3 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -148,7 +148,7 @@ typedef enum {
#define TCG_TARGET_HAS_cmpsel_vec 0
#define TCG_TARGET_DEFAULT_MO (0)
-#define TCG_TARGET_HAS_MEMORY_BSWAP 1
+#define TCG_TARGET_HAS_MEMORY_BSWAP 0
void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t);
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 72aa7e0e74..5924977b42 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1547,28 +1547,34 @@ static void tcg_out_cltz(TCGContext *s, TCGType ext, TCGReg d,
/* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
* TCGMemOpIdx oi, uintptr_t ra)
*/
-static void * const qemu_ld_helpers[16] = {
- [MO_UB] = helper_ret_ldub_mmu,
- [MO_LEUW] = helper_le_lduw_mmu,
- [MO_LEUL] = helper_le_ldul_mmu,
- [MO_LEQ] = helper_le_ldq_mmu,
- [MO_BEUW] = helper_be_lduw_mmu,
- [MO_BEUL] = helper_be_ldul_mmu,
- [MO_BEQ] = helper_be_ldq_mmu,
+static void * const qemu_ld_helpers[4] = {
+ [MO_8] = helper_ret_ldub_mmu,
+#ifdef HOST_WORDS_BIGENDIAN
+ [MO_16] = helper_be_lduw_mmu,
+ [MO_32] = helper_be_ldul_mmu,
+ [MO_64] = helper_be_ldq_mmu,
+#else
+ [MO_16] = helper_le_lduw_mmu,
+ [MO_32] = helper_le_ldul_mmu,
+ [MO_64] = helper_le_ldq_mmu,
+#endif
};
/* helper signature: helper_ret_st_mmu(CPUState *env, target_ulong addr,
* uintxx_t val, TCGMemOpIdx oi,
* uintptr_t ra)
*/
-static void * const qemu_st_helpers[16] = {
- [MO_UB] = helper_ret_stb_mmu,
- [MO_LEUW] = helper_le_stw_mmu,
- [MO_LEUL] = helper_le_stl_mmu,
- [MO_LEQ] = helper_le_stq_mmu,
- [MO_BEUW] = helper_be_stw_mmu,
- [MO_BEUL] = helper_be_stl_mmu,
- [MO_BEQ] = helper_be_stq_mmu,
+static void * const qemu_st_helpers[4] = {
+ [MO_8] = helper_ret_stb_mmu,
+#ifdef HOST_WORDS_BIGENDIAN
+ [MO_16] = helper_be_stw_mmu,
+ [MO_32] = helper_be_stl_mmu,
+ [MO_64] = helper_be_stq_mmu,
+#else
+ [MO_16] = helper_le_stw_mmu,
+ [MO_32] = helper_le_stl_mmu,
+ [MO_64] = helper_le_stq_mmu,
+#endif
};
static inline void tcg_out_adr(TCGContext *s, TCGReg rd, const void *target)
@@ -1592,7 +1598,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg);
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X2, oi);
tcg_out_adr(s, TCG_REG_X3, lb->raddr);
- tcg_out_call(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]);
+ tcg_out_call(s, qemu_ld_helpers[opc & MO_SIZE]);
if (opc & MO_SIGN) {
tcg_out_sxt(s, lb->type, size, lb->datalo_reg, TCG_REG_X0);
} else {
@@ -1618,7 +1624,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
tcg_out_mov(s, size == MO_64, TCG_REG_X2, lb->datalo_reg);
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X3, oi);
tcg_out_adr(s, TCG_REG_X4, lb->raddr);
- tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);
+ tcg_out_call(s, qemu_st_helpers[opc & MO_SIZE]);
tcg_out_goto(s, lb->raddr);
return true;
}
@@ -1714,7 +1720,8 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, MemOp memop, TCGType ext,
TCGReg data_r, TCGReg addr_r,
TCGType otype, TCGReg off_r)
{
- const MemOp bswap = memop & MO_BSWAP;
+ /* Byte swapping is left to middle-end expansion. */
+ tcg_debug_assert((memop & MO_BSWAP) == 0);
switch (memop & MO_SSIZE) {
case MO_UB:
@@ -1726,40 +1733,19 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, MemOp memop, TCGType ext,
break;
case MO_UW:
tcg_out_ldst_r(s, I3312_LDRH, data_r, addr_r, otype, off_r);
- if (bswap) {
- tcg_out_rev(s, TCG_TYPE_I32, MO_16, data_r, data_r);
- }
break;
case MO_SW:
- if (bswap) {
- tcg_out_ldst_r(s, I3312_LDRH, data_r, addr_r, otype, off_r);
- tcg_out_rev(s, TCG_TYPE_I32, MO_16, data_r, data_r);
- tcg_out_sxt(s, ext, MO_16, data_r, data_r);
- } else {
- tcg_out_ldst_r(s, (ext ? I3312_LDRSHX : I3312_LDRSHW),
- data_r, addr_r, otype, off_r);
- }
+ tcg_out_ldst_r(s, (ext ? I3312_LDRSHX : I3312_LDRSHW),
+ data_r, addr_r, otype, off_r);
break;
case MO_UL:
tcg_out_ldst_r(s, I3312_LDRW, data_r, addr_r, otype, off_r);
- if (bswap) {
- tcg_out_rev(s, TCG_TYPE_I32, MO_32, data_r, data_r);
- }
break;
case MO_SL:
- if (bswap) {
- tcg_out_ldst_r(s, I3312_LDRW, data_r, addr_r, otype, off_r);
- tcg_out_rev(s, TCG_TYPE_I32, MO_32, data_r, data_r);
- tcg_out_sxt(s, TCG_TYPE_I64, MO_32, data_r, data_r);
- } else {
- tcg_out_ldst_r(s, I3312_LDRSWX, data_r, addr_r, otype, off_r);
- }
+ tcg_out_ldst_r(s, I3312_LDRSWX, data_r, addr_r, otype, off_r);
break;
case MO_Q:
tcg_out_ldst_r(s, I3312_LDRX, data_r, addr_r, otype, off_r);
- if (bswap) {
- tcg_out_rev(s, TCG_TYPE_I64, MO_64, data_r, data_r);
- }
break;
default:
tcg_abort();
@@ -1770,31 +1756,20 @@ static void tcg_out_qemu_st_direct(TCGContext *s, MemOp memop,
TCGReg data_r, TCGReg addr_r,
TCGType otype, TCGReg off_r)
{
- const MemOp bswap = memop & MO_BSWAP;
+ /* Byte swapping is left to middle-end expansion. */
+ tcg_debug_assert((memop & MO_BSWAP) == 0);
switch (memop & MO_SIZE) {
case MO_8:
tcg_out_ldst_r(s, I3312_STRB, data_r, addr_r, otype, off_r);
break;
case MO_16:
- if (bswap && data_r != TCG_REG_XZR) {
- tcg_out_rev(s, TCG_TYPE_I32, MO_16, TCG_REG_TMP, data_r);
- data_r = TCG_REG_TMP;
- }
tcg_out_ldst_r(s, I3312_STRH, data_r, addr_r, otype, off_r);
break;
case MO_32:
- if (bswap && data_r != TCG_REG_XZR) {
- tcg_out_rev(s, TCG_TYPE_I32, MO_32, TCG_REG_TMP, data_r);
- data_r = TCG_REG_TMP;
- }
tcg_out_ldst_r(s, I3312_STRW, data_r, addr_r, otype, off_r);
break;
case MO_64:
- if (bswap && data_r != TCG_REG_XZR) {
- tcg_out_rev(s, TCG_TYPE_I64, MO_64, TCG_REG_TMP, data_r);
- data_r = TCG_REG_TMP;
- }
tcg_out_ldst_r(s, I3312_STRX, data_r, addr_r, otype, off_r);
break;
default:
--
2.25.1
next prev parent reply other threads:[~2021-06-26 6:57 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-26 6:36 [PATCH v3 00/29] tcg: bswap improvements Richard Henderson
2021-06-26 6:36 ` [PATCH v3 01/29] tcg: Add flags argument to bswap opcodes Richard Henderson
2021-06-26 6:36 ` [PATCH v3 02/29] tcg/i386: Support bswap flags Richard Henderson
2021-06-26 6:36 ` [PATCH v3 03/29] tcg/aarch64: Merge tcg_out_rev{16,32,64} Richard Henderson
2021-06-28 14:16 ` Peter Maydell
2021-06-26 6:36 ` [PATCH v3 04/29] tcg/aarch64: Support bswap flags Richard Henderson
2021-06-26 9:38 ` Philippe Mathieu-Daudé
2021-06-26 6:36 ` [PATCH v3 05/29] tcg/arm: " Richard Henderson
2021-06-26 6:36 ` [PATCH v3 06/29] tcg/ppc: Split out tcg_out_ext{8,16,32}s Richard Henderson
2021-06-26 6:36 ` [PATCH v3 07/29] tcg/ppc: Split out tcg_out_sari{32,64} Richard Henderson
2021-06-26 6:36 ` [PATCH v3 08/29] tcg/ppc: Split out tcg_out_bswap16 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 09/29] tcg/ppc: Split out tcg_out_bswap32 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 10/29] tcg/ppc: Split out tcg_out_bswap64 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 11/29] tcg/ppc: Support bswap flags Richard Henderson
2021-06-26 9:32 ` Philippe Mathieu-Daudé
2021-06-26 6:36 ` [PATCH v3 12/29] tcg/ppc: Use power10 byte-reverse instructions Richard Henderson
2021-06-28 14:33 ` Peter Maydell
2021-06-28 14:45 ` Richard Henderson
2021-06-28 16:22 ` Bruno Piazera Larsen
2021-06-26 6:36 ` [PATCH v3 13/29] tcg/s390: Support bswap flags Richard Henderson
2021-06-28 14:43 ` Peter Maydell
2021-06-28 14:50 ` Richard Henderson
2021-06-26 6:36 ` [PATCH v3 14/29] tcg/mips: Support bswap flags in tcg_out_bswap16 Richard Henderson
2021-06-26 9:30 ` Philippe Mathieu-Daudé
2021-06-26 6:36 ` [PATCH v3 15/29] tcg/mips: Support bswap flags in tcg_out_bswap32 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 16/29] tcg/tci: Support bswap flags Richard Henderson
2021-06-26 6:36 ` [PATCH v3 17/29] tcg: Handle new bswap flags during optimize Richard Henderson
2021-06-26 6:36 ` [PATCH v3 18/29] tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 19/29] tcg: Make use of bswap flags in tcg_gen_qemu_ld_* Richard Henderson
2021-06-26 6:36 ` [PATCH v3 20/29] tcg: Make use of bswap flags in tcg_gen_qemu_st_* Richard Henderson
2021-06-26 6:36 ` [PATCH v3 21/29] target/arm: Improve REV32 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 22/29] target/arm: Improve vector REV Richard Henderson
2021-06-26 6:36 ` [PATCH v3 23/29] target/arm: Improve REVSH Richard Henderson
2021-06-26 6:36 ` [PATCH v3 24/29] target/i386: Improve bswap translation Richard Henderson
2021-06-26 6:36 ` [PATCH v3 25/29] target/sh4: Improve swap.b translation Richard Henderson
2021-06-26 6:36 ` [PATCH v3 26/29] target/mips: Fix gen_mxu_s32ldd_s32lddr Richard Henderson
2021-06-26 6:36 ` [PATCH v3 27/29] tcg/arm: Unset TCG_TARGET_HAS_MEMORY_BSWAP Richard Henderson
2021-06-26 6:36 ` Richard Henderson [this message]
2021-06-26 6:36 ` [PATCH v3 29/29] tcg/riscv: Remove MO_BSWAP handling Richard Henderson
2021-06-26 7:03 ` [PATCH v3 00/29] tcg: bswap improvements no-reply
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210626063631.2411938-29-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).