From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>, qemu-ppc@nongnu.org
Subject: [PATCH v3 08/29] tcg/ppc: Split out tcg_out_bswap16
Date: Fri, 25 Jun 2021 23:36:10 -0700 [thread overview]
Message-ID: <20210626063631.2411938-9-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210626063631.2411938-1-richard.henderson@linaro.org>
With the use of a suitable temporary, we can use the same
algorithm when src overlaps dst. The result is the same
number of instructions either way.
Cc: qemu-ppc@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/ppc/tcg-target.c.inc | 34 +++++++++++++++++++---------------
1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 50347182d7..ad46ce32ca 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -789,6 +789,24 @@ static inline void tcg_out_sari64(TCGContext *s, TCGReg dst, TCGReg src, int c)
tcg_out32(s, SRADI | RA(dst) | RS(src) | SH(c & 0x1f) | ((c >> 4) & 2));
}
+static void tcg_out_bswap16(TCGContext *s, TCGReg dst, TCGReg src)
+{
+ TCGReg tmp = dst == src ? TCG_REG_R0 : dst;
+
+ /*
+ * In the following,
+ * dep(a, b, m) -> (a & ~m) | (b & m)
+ *
+ * Begin with: src = xxxxabcd
+ */
+ /* tmp = rol32(src, 24) & 0x000000ff = 0000000c */
+ tcg_out_rlw(s, RLWINM, tmp, src, 24, 24, 31);
+ /* tmp = dep(tmp, rol32(src, 8), 0x0000ff00) = 000000dc */
+ tcg_out_rlw(s, RLWIMI, tmp, src, 8, 16, 23);
+
+ tcg_out_mov(s, TCG_TYPE_REG, dst, tmp);
+}
+
/* Emit a move into ret of arg, if it can be done in one insn. */
static bool tcg_out_movi_one(TCGContext *s, TCGReg ret, tcg_target_long arg)
{
@@ -2779,21 +2797,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_bswap16_i32:
case INDEX_op_bswap16_i64:
- a0 = args[0], a1 = args[1];
- /* a1 = abcd */
- if (a0 != a1) {
- /* a0 = (a1 r<< 24) & 0xff # 000c */
- tcg_out_rlw(s, RLWINM, a0, a1, 24, 24, 31);
- /* a0 = (a0 & ~0xff00) | (a1 r<< 8) & 0xff00 # 00dc */
- tcg_out_rlw(s, RLWIMI, a0, a1, 8, 16, 23);
- } else {
- /* r0 = (a1 r<< 8) & 0xff00 # 00d0 */
- tcg_out_rlw(s, RLWINM, TCG_REG_R0, a1, 8, 16, 23);
- /* a0 = (a1 r<< 24) & 0xff # 000c */
- tcg_out_rlw(s, RLWINM, a0, a1, 24, 24, 31);
- /* a0 = a0 | r0 # 00dc */
- tcg_out32(s, OR | SAB(TCG_REG_R0, a0, a0));
- }
+ tcg_out_bswap16(s, args[0], args[1]);
break;
case INDEX_op_bswap32_i32:
--
2.25.1
next prev parent reply other threads:[~2021-06-26 6:41 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-26 6:36 [PATCH v3 00/29] tcg: bswap improvements Richard Henderson
2021-06-26 6:36 ` [PATCH v3 01/29] tcg: Add flags argument to bswap opcodes Richard Henderson
2021-06-26 6:36 ` [PATCH v3 02/29] tcg/i386: Support bswap flags Richard Henderson
2021-06-26 6:36 ` [PATCH v3 03/29] tcg/aarch64: Merge tcg_out_rev{16,32,64} Richard Henderson
2021-06-28 14:16 ` Peter Maydell
2021-06-26 6:36 ` [PATCH v3 04/29] tcg/aarch64: Support bswap flags Richard Henderson
2021-06-26 9:38 ` Philippe Mathieu-Daudé
2021-06-26 6:36 ` [PATCH v3 05/29] tcg/arm: " Richard Henderson
2021-06-26 6:36 ` [PATCH v3 06/29] tcg/ppc: Split out tcg_out_ext{8,16,32}s Richard Henderson
2021-06-26 6:36 ` [PATCH v3 07/29] tcg/ppc: Split out tcg_out_sari{32,64} Richard Henderson
2021-06-26 6:36 ` Richard Henderson [this message]
2021-06-26 6:36 ` [PATCH v3 09/29] tcg/ppc: Split out tcg_out_bswap32 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 10/29] tcg/ppc: Split out tcg_out_bswap64 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 11/29] tcg/ppc: Support bswap flags Richard Henderson
2021-06-26 9:32 ` Philippe Mathieu-Daudé
2021-06-26 6:36 ` [PATCH v3 12/29] tcg/ppc: Use power10 byte-reverse instructions Richard Henderson
2021-06-28 14:33 ` Peter Maydell
2021-06-28 14:45 ` Richard Henderson
2021-06-28 16:22 ` Bruno Piazera Larsen
2021-06-26 6:36 ` [PATCH v3 13/29] tcg/s390: Support bswap flags Richard Henderson
2021-06-28 14:43 ` Peter Maydell
2021-06-28 14:50 ` Richard Henderson
2021-06-26 6:36 ` [PATCH v3 14/29] tcg/mips: Support bswap flags in tcg_out_bswap16 Richard Henderson
2021-06-26 9:30 ` Philippe Mathieu-Daudé
2021-06-26 6:36 ` [PATCH v3 15/29] tcg/mips: Support bswap flags in tcg_out_bswap32 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 16/29] tcg/tci: Support bswap flags Richard Henderson
2021-06-26 6:36 ` [PATCH v3 17/29] tcg: Handle new bswap flags during optimize Richard Henderson
2021-06-26 6:36 ` [PATCH v3 18/29] tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 19/29] tcg: Make use of bswap flags in tcg_gen_qemu_ld_* Richard Henderson
2021-06-26 6:36 ` [PATCH v3 20/29] tcg: Make use of bswap flags in tcg_gen_qemu_st_* Richard Henderson
2021-06-26 6:36 ` [PATCH v3 21/29] target/arm: Improve REV32 Richard Henderson
2021-06-26 6:36 ` [PATCH v3 22/29] target/arm: Improve vector REV Richard Henderson
2021-06-26 6:36 ` [PATCH v3 23/29] target/arm: Improve REVSH Richard Henderson
2021-06-26 6:36 ` [PATCH v3 24/29] target/i386: Improve bswap translation Richard Henderson
2021-06-26 6:36 ` [PATCH v3 25/29] target/sh4: Improve swap.b translation Richard Henderson
2021-06-26 6:36 ` [PATCH v3 26/29] target/mips: Fix gen_mxu_s32ldd_s32lddr Richard Henderson
2021-06-26 6:36 ` [PATCH v3 27/29] tcg/arm: Unset TCG_TARGET_HAS_MEMORY_BSWAP Richard Henderson
2021-06-26 6:36 ` [PATCH v3 28/29] tcg/aarch64: " Richard Henderson
2021-06-26 6:36 ` [PATCH v3 29/29] tcg/riscv: Remove MO_BSWAP handling Richard Henderson
2021-06-26 7:03 ` [PATCH v3 00/29] tcg: bswap improvements no-reply
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