From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 17/24] target/arm: Implement MVE VSHRN, VRSHRN
Date: Fri, 2 Jul 2021 13:59:47 +0100 [thread overview]
Message-ID: <20210702125954.13247-18-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210702125954.13247-1-peter.maydell@linaro.org>
Implement the MVE shift-right-and-narrow insn VSHRN and VRSHRN.
do_urshr() is borrowed from sve_helper.c.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210628135835.6690-12-peter.maydell@linaro.org
---
target/arm/helper-mve.h | 10 ++++++++++
target/arm/mve.decode | 11 +++++++++++
target/arm/mve_helper.c | 40 ++++++++++++++++++++++++++++++++++++++
target/arm/translate-mve.c | 15 ++++++++++++++
4 files changed, 76 insertions(+)
diff --git a/target/arm/helper-mve.h b/target/arm/helper-mve.h
index e452d2ef7a0..323ac07fa35 100644
--- a/target/arm/helper-mve.h
+++ b/target/arm/helper-mve.h
@@ -404,3 +404,13 @@ DEF_HELPER_FLAGS_4(mve_vsriw, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(mve_vslib, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(mve_vslih, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(mve_vsliw, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_4(mve_vshrnbb, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(mve_vshrnbh, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(mve_vshrntb, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(mve_vshrnth, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_4(mve_vrshrnbb, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(mve_vrshrnbh, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(mve_vrshrntb, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(mve_vrshrnth, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)
diff --git a/target/arm/mve.decode b/target/arm/mve.decode
index c3b5366617a..e2c177f56a2 100644
--- a/target/arm/mve.decode
+++ b/target/arm/mve.decode
@@ -380,3 +380,14 @@ VSRI 111 1 1111 1 . ... ... ... 0 0100 0 1 . 1 ... 0 @2_shr_w
VSLI 111 1 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_b
VSLI 111 1 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_h
VSLI 111 1 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_w
+
+# Narrowing shifts (which only support b and h sizes)
+VSHRNB 111 0 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 1 @2_shr_b
+VSHRNB 111 0 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 1 @2_shr_h
+VSHRNT 111 0 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 1 @2_shr_b
+VSHRNT 111 0 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 1 @2_shr_h
+
+VRSHRNB 111 1 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 1 @2_shr_b
+VRSHRNB 111 1 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 1 @2_shr_h
+VRSHRNT 111 1 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 1 @2_shr_b
+VRSHRNT 111 1 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 1 @2_shr_h
diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c
index 24336d1d28a..a97942208ba 100644
--- a/target/arm/mve_helper.c
+++ b/target/arm/mve_helper.c
@@ -1324,3 +1324,43 @@ DO_2SHIFT_INSERT(vsliw, 4, DO_SHL, SHL_MASK)
DO_VSHLL_ALL(vshllb, false)
DO_VSHLL_ALL(vshllt, true)
+
+/*
+ * Narrowing right shifts, taking a double sized input, shifting it
+ * and putting the result in either the top or bottom half of the output.
+ * ESIZE, TYPE are the output, and LESIZE, LTYPE the input.
+ */
+#define DO_VSHRN(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN) \
+ void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, \
+ void *vm, uint32_t shift) \
+ { \
+ LTYPE *m = vm; \
+ TYPE *d = vd; \
+ uint16_t mask = mve_element_mask(env); \
+ unsigned le; \
+ for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) { \
+ TYPE r = FN(m[H##LESIZE(le)], shift); \
+ mergemask(&d[H##ESIZE(le * 2 + TOP)], r, mask); \
+ } \
+ mve_advance_vpt(env); \
+ }
+
+#define DO_VSHRN_ALL(OP, FN) \
+ DO_VSHRN(OP##bb, false, 1, uint8_t, 2, uint16_t, FN) \
+ DO_VSHRN(OP##bh, false, 2, uint16_t, 4, uint32_t, FN) \
+ DO_VSHRN(OP##tb, true, 1, uint8_t, 2, uint16_t, FN) \
+ DO_VSHRN(OP##th, true, 2, uint16_t, 4, uint32_t, FN)
+
+static inline uint64_t do_urshr(uint64_t x, unsigned sh)
+{
+ if (likely(sh < 64)) {
+ return (x >> sh) + ((x >> (sh - 1)) & 1);
+ } else if (sh == 64) {
+ return x >> 63;
+ } else {
+ return 0;
+ }
+}
+
+DO_VSHRN_ALL(vshrn, DO_SHR)
+DO_VSHRN_ALL(vrshrn, do_urshr)
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c
index b031f84966e..f1a8f21b772 100644
--- a/target/arm/translate-mve.c
+++ b/target/arm/translate-mve.c
@@ -911,3 +911,18 @@ DO_VSHLL(VSHLL_BS, vshllbs)
DO_VSHLL(VSHLL_BU, vshllbu)
DO_VSHLL(VSHLL_TS, vshllts)
DO_VSHLL(VSHLL_TU, vshlltu)
+
+#define DO_2SHIFT_N(INSN, FN) \
+ static bool trans_##INSN(DisasContext *s, arg_2shift *a) \
+ { \
+ static MVEGenTwoOpShiftFn * const fns[] = { \
+ gen_helper_mve_##FN##b, \
+ gen_helper_mve_##FN##h, \
+ }; \
+ return do_2shift(s, a, fns[a->size], false); \
+ }
+
+DO_2SHIFT_N(VSHRNB, vshrnb)
+DO_2SHIFT_N(VSHRNT, vshrnt)
+DO_2SHIFT_N(VRSHRNB, vrshrnb)
+DO_2SHIFT_N(VRSHRNT, vrshrnt)
--
2.20.1
next prev parent reply other threads:[~2021-07-02 13:13 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-02 12:59 [PULL 00/24] target-arm queue Peter Maydell
2021-07-02 12:59 ` [PULL 01/24] docs/system/arm: Add quanta-q7l1-bmc reference Peter Maydell
2021-07-02 12:59 ` [PULL 02/24] docs/system/arm: Add quanta-gbs-bmc reference Peter Maydell
2021-07-02 12:59 ` [PULL 03/24] hw/arm: Add basic power management to raspi Peter Maydell
2021-07-02 12:59 ` [PULL 04/24] tests: Boot and halt a Linux guest on the Raspberry Pi 2 machine Peter Maydell
2021-07-02 12:59 ` [PULL 05/24] target/arm: Check NaN mode before silencing NaN Peter Maydell
2021-07-02 12:59 ` [PULL 06/24] hw/gpio/gpio_pwr: use shutdown function for reboot Peter Maydell
2021-07-02 12:59 ` [PULL 07/24] target/arm: Fix MVE widening/narrowing VLDR/VSTR offset calculation Peter Maydell
2021-07-02 12:59 ` [PULL 08/24] target/arm: Fix bugs in MVE VRMLALDAVH, VRMLSLDAVH Peter Maydell
2021-07-02 12:59 ` [PULL 09/24] target/arm: Make asimd_imm_const() public Peter Maydell
2021-07-02 12:59 ` [PULL 10/24] target/arm: Use asimd_imm_const for A64 decode Peter Maydell
2021-07-02 12:59 ` [PULL 11/24] target/arm: Use dup_const() instead of bitfield_replicate() Peter Maydell
2021-07-02 12:59 ` [PULL 12/24] target/arm: Implement MVE logical immediate insns Peter Maydell
2021-07-02 12:59 ` [PULL 13/24] target/arm: Implement MVE vector shift left by " Peter Maydell
2021-07-02 12:59 ` [PULL 14/24] target/arm: Implement MVE vector shift right " Peter Maydell
2021-07-02 12:59 ` [PULL 15/24] target/arm: Implement MVE VSHLL Peter Maydell
2021-07-02 12:59 ` [PULL 16/24] target/arm: Implement MVE VSRI, VSLI Peter Maydell
2021-07-02 12:59 ` Peter Maydell [this message]
2021-07-02 12:59 ` [PULL 18/24] target/arm: Implement MVE saturating narrowing shifts Peter Maydell
2021-07-02 12:59 ` [PULL 19/24] target/arm: Implement MVE VSHLC Peter Maydell
2021-07-02 12:59 ` [PULL 20/24] target/arm: Implement MVE VADDLV Peter Maydell
2021-07-02 12:59 ` [PULL 21/24] target/arm: Implement MVE long shifts by immediate Peter Maydell
2021-07-02 12:59 ` [PULL 22/24] target/arm: Implement MVE long shifts by register Peter Maydell
2021-07-02 12:59 ` [PULL 23/24] target/arm: Implement MVE shifts by immediate Peter Maydell
2021-07-02 12:59 ` [PULL 24/24] target/arm: Implement MVE shifts by register Peter Maydell
2021-07-04 13:03 ` [PULL 00/24] target-arm queue Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210702125954.13247-18-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).