From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 05/24] target/arm: Check NaN mode before silencing NaN
Date: Fri, 2 Jul 2021 13:59:35 +0100 [thread overview]
Message-ID: <20210702125954.13247-6-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210702125954.13247-1-peter.maydell@linaro.org>
From: Joe Komlodi <joe.komlodi@xilinx.com>
If the CPU is running in default NaN mode (FPCR.DN == 1) and we execute
FRSQRTE, FRECPE, or FRECPX with a signaling NaN, parts_silence_nan_frac() will
assert due to fpst->default_nan_mode being set.
To avoid this, we check to see what NaN mode we're running in before we call
floatxx_silence_nan().
Signed-off-by: Joe Komlodi <joe.komlodi@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1624662174-175828-2-git-send-email-joe.komlodi@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper-a64.c | 12 +++++++++---
target/arm/vfp_helper.c | 24 ++++++++++++++++++------
2 files changed, 27 insertions(+), 9 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 9cc3b066e28..ac5c4452d53 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -365,7 +365,9 @@ uint32_t HELPER(frecpx_f16)(uint32_t a, void *fpstp)
float16 nan = a;
if (float16_is_signaling_nan(a, fpst)) {
float_raise(float_flag_invalid, fpst);
- nan = float16_silence_nan(a, fpst);
+ if (!fpst->default_nan_mode) {
+ nan = float16_silence_nan(a, fpst);
+ }
}
if (fpst->default_nan_mode) {
nan = float16_default_nan(fpst);
@@ -396,7 +398,9 @@ float32 HELPER(frecpx_f32)(float32 a, void *fpstp)
float32 nan = a;
if (float32_is_signaling_nan(a, fpst)) {
float_raise(float_flag_invalid, fpst);
- nan = float32_silence_nan(a, fpst);
+ if (!fpst->default_nan_mode) {
+ nan = float32_silence_nan(a, fpst);
+ }
}
if (fpst->default_nan_mode) {
nan = float32_default_nan(fpst);
@@ -427,7 +431,9 @@ float64 HELPER(frecpx_f64)(float64 a, void *fpstp)
float64 nan = a;
if (float64_is_signaling_nan(a, fpst)) {
float_raise(float_flag_invalid, fpst);
- nan = float64_silence_nan(a, fpst);
+ if (!fpst->default_nan_mode) {
+ nan = float64_silence_nan(a, fpst);
+ }
}
if (fpst->default_nan_mode) {
nan = float64_default_nan(fpst);
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 8a716600592..24e3d820a5b 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -671,7 +671,9 @@ uint32_t HELPER(recpe_f16)(uint32_t input, void *fpstp)
float16 nan = f16;
if (float16_is_signaling_nan(f16, fpst)) {
float_raise(float_flag_invalid, fpst);
- nan = float16_silence_nan(f16, fpst);
+ if (!fpst->default_nan_mode) {
+ nan = float16_silence_nan(f16, fpst);
+ }
}
if (fpst->default_nan_mode) {
nan = float16_default_nan(fpst);
@@ -719,7 +721,9 @@ float32 HELPER(recpe_f32)(float32 input, void *fpstp)
float32 nan = f32;
if (float32_is_signaling_nan(f32, fpst)) {
float_raise(float_flag_invalid, fpst);
- nan = float32_silence_nan(f32, fpst);
+ if (!fpst->default_nan_mode) {
+ nan = float32_silence_nan(f32, fpst);
+ }
}
if (fpst->default_nan_mode) {
nan = float32_default_nan(fpst);
@@ -767,7 +771,9 @@ float64 HELPER(recpe_f64)(float64 input, void *fpstp)
float64 nan = f64;
if (float64_is_signaling_nan(f64, fpst)) {
float_raise(float_flag_invalid, fpst);
- nan = float64_silence_nan(f64, fpst);
+ if (!fpst->default_nan_mode) {
+ nan = float64_silence_nan(f64, fpst);
+ }
}
if (fpst->default_nan_mode) {
nan = float64_default_nan(fpst);
@@ -866,7 +872,9 @@ uint32_t HELPER(rsqrte_f16)(uint32_t input, void *fpstp)
float16 nan = f16;
if (float16_is_signaling_nan(f16, s)) {
float_raise(float_flag_invalid, s);
- nan = float16_silence_nan(f16, s);
+ if (!s->default_nan_mode) {
+ nan = float16_silence_nan(f16, fpstp);
+ }
}
if (s->default_nan_mode) {
nan = float16_default_nan(s);
@@ -910,7 +918,9 @@ float32 HELPER(rsqrte_f32)(float32 input, void *fpstp)
float32 nan = f32;
if (float32_is_signaling_nan(f32, s)) {
float_raise(float_flag_invalid, s);
- nan = float32_silence_nan(f32, s);
+ if (!s->default_nan_mode) {
+ nan = float32_silence_nan(f32, fpstp);
+ }
}
if (s->default_nan_mode) {
nan = float32_default_nan(s);
@@ -953,7 +963,9 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
float64 nan = f64;
if (float64_is_signaling_nan(f64, s)) {
float_raise(float_flag_invalid, s);
- nan = float64_silence_nan(f64, s);
+ if (!s->default_nan_mode) {
+ nan = float64_silence_nan(f64, fpstp);
+ }
}
if (s->default_nan_mode) {
nan = float64_default_nan(s);
--
2.20.1
next prev parent reply other threads:[~2021-07-02 13:02 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-02 12:59 [PULL 00/24] target-arm queue Peter Maydell
2021-07-02 12:59 ` [PULL 01/24] docs/system/arm: Add quanta-q7l1-bmc reference Peter Maydell
2021-07-02 12:59 ` [PULL 02/24] docs/system/arm: Add quanta-gbs-bmc reference Peter Maydell
2021-07-02 12:59 ` [PULL 03/24] hw/arm: Add basic power management to raspi Peter Maydell
2021-07-02 12:59 ` [PULL 04/24] tests: Boot and halt a Linux guest on the Raspberry Pi 2 machine Peter Maydell
2021-07-02 12:59 ` Peter Maydell [this message]
2021-07-02 12:59 ` [PULL 06/24] hw/gpio/gpio_pwr: use shutdown function for reboot Peter Maydell
2021-07-02 12:59 ` [PULL 07/24] target/arm: Fix MVE widening/narrowing VLDR/VSTR offset calculation Peter Maydell
2021-07-02 12:59 ` [PULL 08/24] target/arm: Fix bugs in MVE VRMLALDAVH, VRMLSLDAVH Peter Maydell
2021-07-02 12:59 ` [PULL 09/24] target/arm: Make asimd_imm_const() public Peter Maydell
2021-07-02 12:59 ` [PULL 10/24] target/arm: Use asimd_imm_const for A64 decode Peter Maydell
2021-07-02 12:59 ` [PULL 11/24] target/arm: Use dup_const() instead of bitfield_replicate() Peter Maydell
2021-07-02 12:59 ` [PULL 12/24] target/arm: Implement MVE logical immediate insns Peter Maydell
2021-07-02 12:59 ` [PULL 13/24] target/arm: Implement MVE vector shift left by " Peter Maydell
2021-07-02 12:59 ` [PULL 14/24] target/arm: Implement MVE vector shift right " Peter Maydell
2021-07-02 12:59 ` [PULL 15/24] target/arm: Implement MVE VSHLL Peter Maydell
2021-07-02 12:59 ` [PULL 16/24] target/arm: Implement MVE VSRI, VSLI Peter Maydell
2021-07-02 12:59 ` [PULL 17/24] target/arm: Implement MVE VSHRN, VRSHRN Peter Maydell
2021-07-02 12:59 ` [PULL 18/24] target/arm: Implement MVE saturating narrowing shifts Peter Maydell
2021-07-02 12:59 ` [PULL 19/24] target/arm: Implement MVE VSHLC Peter Maydell
2021-07-02 12:59 ` [PULL 20/24] target/arm: Implement MVE VADDLV Peter Maydell
2021-07-02 12:59 ` [PULL 21/24] target/arm: Implement MVE long shifts by immediate Peter Maydell
2021-07-02 12:59 ` [PULL 22/24] target/arm: Implement MVE long shifts by register Peter Maydell
2021-07-02 12:59 ` [PULL 23/24] target/arm: Implement MVE shifts by immediate Peter Maydell
2021-07-02 12:59 ` [PULL 24/24] target/arm: Implement MVE shifts by register Peter Maydell
2021-07-04 13:03 ` [PULL 00/24] target-arm queue Peter Maydell
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