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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Jason Wang" <jasowang@redhat.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Laurent Vivier" <laurent@vivier.eu>,
	"Finn Thain" <fthain@linux-m68k.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [RFC PATCH 2/3] dp8393x: Do not amend CRC if it is inhibited (CRCI bit set)
Date: Sat,  3 Jul 2021 17:02:18 +0200	[thread overview]
Message-ID: <20210703150219.364582-3-f4bug@amsat.org> (raw)
In-Reply-To: <20210703150219.364582-1-f4bug@amsat.org>

When the CRCI (CRC INHIBIT) bit is set, the 4-byte FCS field
is not transmitted.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/net/dp8393x.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index 99e179a5e86..dee8236400c 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -472,6 +472,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
              */
         } else {
             /* Remove existing FCS */
+            /* TODO check crc */
             tx_len -= 4;
             if (tx_len < 0) {
                 trace_dp8393x_transmit_txlen_error(tx_len);
@@ -758,7 +759,10 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
         return pkt_size;
     }
 
-    rx_len = pkt_size + sizeof(checksum);
+    rx_len = pkt_size;
+    if (s->regs[SONIC_TCR] & SONIC_TCR_CRCI) {
+        rx_len += sizeof(checksum);
+    }
     if (s->regs[SONIC_DCR] & SONIC_DCR_DW) {
         padded_len = ((rx_len - 1) | 3) + 1;
     } else {
@@ -801,9 +805,6 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
     s->regs[SONIC_TRBA1] = s->regs[SONIC_CRBA1];
     s->regs[SONIC_TRBA0] = s->regs[SONIC_CRBA0];
 
-    /* Calculate the ethernet checksum */
-    checksum = crc32(0, buf, pkt_size);
-
     /* Put packet into RBA */
     trace_dp8393x_receive_packet(dp8393x_crba(s));
     address = dp8393x_crba(s);
@@ -811,10 +812,15 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
                         buf, pkt_size);
     address += pkt_size;
 
-    /* Put frame checksum into RBA */
-    address_space_stl_le(&s->as, address, checksum, MEMTXATTRS_UNSPECIFIED,
-                         NULL);
-    address += sizeof(checksum);
+    if (s->regs[SONIC_TCR] & SONIC_TCR_CRCI) {
+        /* Calculate the ethernet checksum */
+        checksum = crc32(0, buf, pkt_size);
+
+        /* Put frame checksum into RBA */
+        address_space_stl_le(&s->as, address, checksum, MEMTXATTRS_UNSPECIFIED,
+                             NULL);
+        address += sizeof(checksum);
+    }
 
     /* Pad short packets to keep pointers aligned */
     if (rx_len < padded_len) {
-- 
2.31.1



  parent reply	other threads:[~2021-07-03 15:04 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-03 15:02 [RFC PATCH 0/3] dp8393x: Reviewing CRC code Philippe Mathieu-Daudé
2021-07-03 15:02 ` [RFC PATCH 1/3] dp8393x: Store CRC using address_space_stl_le() Philippe Mathieu-Daudé
2021-07-03 15:02 ` Philippe Mathieu-Daudé [this message]
2021-07-03 16:32   ` [RFC PATCH 2/3] dp8393x: Do not amend CRC if it is inhibited (CRCI bit set) BALATON Zoltan
2021-07-03 16:40     ` Philippe Mathieu-Daudé
2021-07-04  0:49   ` Finn Thain
2021-07-03 15:02 ` [RFC PATCH 3/3] dp8393x: Store CRC using device configured endianess Philippe Mathieu-Daudé
2021-07-04  1:28 ` [RFC PATCH 0/3] dp8393x: Reviewing CRC code Finn Thain

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