qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: alistair.francis@wdc.com, qemu-riscv@nongnu.org
Subject: [PATCH 05/17] target/riscv: Use gpr_{src, dst} and tcg_constant_tl in gen_grevi
Date: Thu,  8 Jul 2021 21:25:56 -0700	[thread overview]
Message-ID: <20210709042608.883256-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210709042608.883256-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/riscv/translate.c | 17 +++++------------
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 7dedfd548b..6ad40e43b0 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -620,23 +620,16 @@ static void gen_sro(TCGv ret, TCGv arg1, TCGv arg2)
 
 static bool gen_grevi(DisasContext *ctx, arg_grevi *a)
 {
-    TCGv source1 = tcg_temp_new();
-    TCGv source2;
-
-    gen_get_gpr(source1, a->rs1);
+    TCGv dest = gpr_dst(ctx, a->rd);
+    TCGv src1 = gpr_src(ctx, a->rs1);
 
     if (a->shamt == (TARGET_LONG_BITS - 8)) {
         /* rev8, byte swaps */
-        tcg_gen_bswap_tl(source1, source1);
+        tcg_gen_bswap_tl(dest, src1);
     } else {
-        source2 = tcg_temp_new();
-        tcg_gen_movi_tl(source2, a->shamt);
-        gen_helper_grev(source1, source1, source2);
-        tcg_temp_free(source2);
+        TCGv src2 = tcg_constant_tl(a->shamt);
+        gen_helper_grev(dest, src1, src2);
     }
-
-    gen_set_gpr(a->rd, source1);
-    tcg_temp_free(source1);
     return true;
 }
 
-- 
2.25.1



  parent reply	other threads:[~2021-07-09  4:49 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-09  4:25 [PATCH 00/17] target/riscv: Use tcg_constant_* Richard Henderson
2021-07-09  4:25 ` [PATCH 01/17] " Richard Henderson
2021-07-09  5:41   ` Alistair Francis
2021-07-09 16:20   ` Philippe Mathieu-Daudé
2021-07-09  4:25 ` [PATCH 02/17] target/riscv: Introduce gpr_src, gpr_dst Richard Henderson
2021-07-09  5:45   ` Alistair Francis
2021-07-09  4:25 ` [PATCH 03/17] target/riscv: Use gpr_{src,dst} in shift operations Richard Henderson
2021-07-13  4:10   ` [PATCH 03/17] target/riscv: Use gpr_{src, dst} " Alistair Francis
2021-07-09  4:25 ` [PATCH 04/17] target/riscv: Use gpr_{src, dst} in word division operations Richard Henderson
2021-07-13  4:11   ` Alistair Francis
2021-07-09  4:25 ` Richard Henderson [this message]
2021-07-13  4:12   ` [PATCH 05/17] target/riscv: Use gpr_{src, dst} and tcg_constant_tl in gen_grevi Alistair Francis
2021-07-09  4:25 ` [PATCH 06/17] target/riscv: Use gpr_src in branches Richard Henderson
2021-07-13  4:14   ` Alistair Francis
2021-07-09  4:25 ` [PATCH 07/17] target/riscv: Use gpr_{src,dst} for integer load/store Richard Henderson
2021-07-13  4:18   ` [PATCH 07/17] target/riscv: Use gpr_{src, dst} " Alistair Francis
2021-07-09  4:25 ` [PATCH 08/17] target/riscv: Use gpr_{src, dst} for word shift operations Richard Henderson
2021-07-15  4:49   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 09/17] target/riscv: Reorg csr instructions Richard Henderson
2021-07-23  5:00   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 10/17] target/riscv: Use gpr_{src,dst} for RVA Richard Henderson
2021-07-15  4:50   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 11/17] target/riscv: Use gpr_{src,dst} for RVB Richard Henderson
2021-07-15  4:52   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 12/17] target/riscv: Use gpr_{src,dst} for RVF Richard Henderson
2021-07-15  4:58   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 13/17] target/riscv: Use gpr_{src,dst} for RVD Richard Henderson
2021-07-15  5:00   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 14/17] target/riscv: Tidy trans_rvh.c.inc Richard Henderson
2021-07-23  5:02   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 15/17] target/riscv: Use gen_arith for mulh and mulhu Richard Henderson
2021-07-15  5:02   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 16/17] target/riscv: Use gpr_{src,dst} for RVV Richard Henderson
2021-07-15  5:04   ` Alistair Francis
2021-07-09  4:26 ` [PATCH 17/17] target/riscv: Remove gen_get_gpr Richard Henderson
2021-07-15  5:08   ` Alistair Francis
2021-07-15 11:21 ` [PATCH 00/17] target/riscv: Use tcg_constant_* LIU Zhiwei
2021-07-15 16:15   ` Richard Henderson
2021-07-17  3:59     ` LIU Zhiwei
2021-07-17 15:41       ` Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210709042608.883256-6-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=alistair.francis@wdc.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).