From: Yang Zhong <yang.zhong@intel.com>
To: qemu-devel@nongnu.org
Cc: yang.zhong@intel.com, seanjc@google.com, kai.huang@intel.com,
jarkko@kernel.org, pbonzini@redhat.com, eblake@redhat.com
Subject: [PATCH v3 15/33] Adjust min CPUID level to 0x12 when SGX is enabled
Date: Fri, 9 Jul 2021 19:09:37 +0800 [thread overview]
Message-ID: <20210709110955.73256-16-yang.zhong@intel.com> (raw)
In-Reply-To: <20210709110955.73256-1-yang.zhong@intel.com>
From: Sean Christopherson <sean.j.christopherson@intel.com>
SGX capabilities are enumerated through CPUID_0x12.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
---
target/i386/cpu.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index d5c0f5dba2..4172081cee 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6113,6 +6113,11 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
if (sev_enabled()) {
x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F);
}
+
+ /* SGX requires CPUID[0x12] for EPC enumeration */
+ if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) {
+ x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12);
+ }
}
/* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */
--
2.29.2.334.gfaefdd61ec
next prev parent reply other threads:[~2021-07-09 11:25 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 11:09 [PATCH v3 00/33] Qemu SGX virtualization Yang Zhong
2021-07-09 11:09 ` [PATCH v3 01/33] memory: Add RAM_PROTECTED flag to skip IOMMU mappings Yang Zhong
2021-07-09 11:09 ` [PATCH v3 02/33] hostmem: Add hostmem-epc as a backend for SGX EPC Yang Zhong
2021-07-09 11:09 ` [PATCH v3 03/33] qom: Add memory-backend-epc ObjectOptions support Yang Zhong
2021-07-09 11:09 ` [PATCH v3 04/33] i386: Add 'sgx-epc' device to expose EPC sections to guest Yang Zhong
2021-07-09 11:09 ` [PATCH v3 05/33] vl: Add sgx compound properties to expose SGX " Yang Zhong
2021-07-09 16:07 ` Paolo Bonzini
2021-07-12 9:23 ` Yang Zhong
2021-07-09 11:09 ` [PATCH v3 06/33] i386: Add primary SGX CPUID and MSR defines Yang Zhong
2021-07-09 11:09 ` [PATCH v3 07/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX Yang Zhong
2021-07-09 11:09 ` [PATCH v3 08/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX Yang Zhong
2021-07-09 11:09 ` [PATCH v3 09/33] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX Yang Zhong
2021-07-09 11:09 ` [PATCH v3 10/33] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs Yang Zhong
2021-07-09 11:09 ` [PATCH v3 11/33] i386: Add feature control MSR dependency when SGX is enabled Yang Zhong
2021-07-09 11:09 ` [PATCH v3 12/33] i386: Update SGX CPUID info according to hardware/KVM/user input Yang Zhong
2021-07-09 11:09 ` [PATCH v3 13/33] i386: kvm: Add support for exposing PROVISIONKEY to guest Yang Zhong
2021-07-09 11:09 ` [PATCH v3 14/33] i386: Propagate SGX CPUID sub-leafs to KVM Yang Zhong
2021-07-09 11:09 ` Yang Zhong [this message]
2021-07-09 11:09 ` [PATCH v3 16/33] hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly Yang Zhong
2021-07-09 11:09 ` [PATCH v3 17/33] hw/i386/pc: Account for SGX EPC sections when calculating device memory Yang Zhong
2021-07-09 11:09 ` [PATCH v3 18/33] i386/pc: Add e820 entry for SGX EPC section(s) Yang Zhong
2021-07-09 11:09 ` [PATCH v3 19/33] i386: acpi: Add SGX EPC entry to ACPI tables Yang Zhong
2021-07-09 11:09 ` [PATCH v3 20/33] q35: Add support for SGX EPC Yang Zhong
2021-07-09 11:09 ` [PATCH v3 21/33] i440fx: " Yang Zhong
2021-07-09 11:09 ` [PATCH v3 22/33] hostmem-epc: Add the reset interface for EPC backend reset Yang Zhong
2021-07-09 11:09 ` [PATCH v3 23/33] sgx-epc: Add the reset interface for sgx-epc virt device Yang Zhong
2021-07-09 11:09 ` [PATCH v3 24/33] sgx-epc: Avoid bios reset during sgx epc initialization Yang Zhong
2021-07-09 11:09 ` [PATCH v3 25/33] hostmem-epc: Make prealloc consistent with qemu cmdline during reset Yang Zhong
2021-07-09 11:09 ` [PATCH v3 26/33] qmp: Add query-sgx command Yang Zhong
2021-07-09 11:09 ` [PATCH v3 27/33] hmp: Add 'info sgx' command Yang Zhong
2021-07-09 11:09 ` [PATCH v3 28/33] i386: Add sgx_get_info() interface Yang Zhong
2021-07-09 11:09 ` [PATCH v3 29/33] bitops: Support 32 and 64 bit mask macro Yang Zhong
2021-07-09 11:09 ` [PATCH v3 30/33] qmp: Add the qmp_query_sgx_capabilities() Yang Zhong
2021-07-09 11:09 ` [PATCH v3 31/33] Kconfig: Add CONFIG_SGX support Yang Zhong
2021-07-09 11:09 ` [PATCH v3 32/33] sgx-epc: Add the fill_device_info() callback support Yang Zhong
2021-07-09 11:09 ` [PATCH v3 33/33] doc: Add the SGX doc Yang Zhong
2021-07-09 17:48 ` [PATCH v3 00/33] Qemu SGX virtualization Jarkko Sakkinen
2021-07-12 6:57 ` Yang Zhong
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210709110955.73256-16-yang.zhong@intel.com \
--to=yang.zhong@intel.com \
--cc=eblake@redhat.com \
--cc=jarkko@kernel.org \
--cc=kai.huang@intel.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=seanjc@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).