From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 07/17] hw/gpio/pl061: Clean up read/write offset handling logic
Date: Fri, 9 Jul 2021 17:09:53 +0100 [thread overview]
Message-ID: <20210709161003.25874-8-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210709161003.25874-1-peter.maydell@linaro.org>
Currently the pl061_read() and pl061_write() functions handle offsets
using a combination of three if() statements and a switch(). Clean
this up to use just a switch, using case ranges.
This requires that instead of catching accesses to the luminary-only
registers on a stock PL061 via a check on s->rsvd_start we use
an "is this luminary?" check in the cases for each luminary-only
register.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/gpio/pl061.c | 104 ++++++++++++++++++++++++++++++++++++------------
1 file changed, 79 insertions(+), 25 deletions(-)
diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c
index a6ace88895d..b21b230402f 100644
--- a/hw/gpio/pl061.c
+++ b/hw/gpio/pl061.c
@@ -55,7 +55,6 @@ struct PL061State {
qemu_irq irq;
qemu_irq out[N_GPIOS];
const unsigned char *id;
- uint32_t rsvd_start; /* reserved area: [rsvd_start, 0xfcc] */
};
static const VMStateDescription vmstate_pl061 = {
@@ -151,16 +150,9 @@ static uint64_t pl061_read(void *opaque, hwaddr offset,
{
PL061State *s = (PL061State *)opaque;
- if (offset < 0x400) {
- return s->data & (offset >> 2);
- }
- if (offset >= s->rsvd_start && offset <= 0xfcc) {
- goto err_out;
- }
- if (offset >= 0xfd0 && offset < 0x1000) {
- return s->id[(offset - 0xfd0) >> 2];
- }
switch (offset) {
+ case 0x0 ... 0x3ff: /* Data */
+ return s->data & (offset >> 2);
case 0x400: /* Direction */
return s->dir;
case 0x404: /* Interrupt sense */
@@ -178,33 +170,68 @@ static uint64_t pl061_read(void *opaque, hwaddr offset,
case 0x420: /* Alternate function select */
return s->afsel;
case 0x500: /* 2mA drive */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->dr2r;
case 0x504: /* 4mA drive */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->dr4r;
case 0x508: /* 8mA drive */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->dr8r;
case 0x50c: /* Open drain */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->odr;
case 0x510: /* Pull-up */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->pur;
case 0x514: /* Pull-down */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->pdr;
case 0x518: /* Slew rate control */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->slr;
case 0x51c: /* Digital enable */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->den;
case 0x520: /* Lock */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->locked;
case 0x524: /* Commit */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->cr;
case 0x528: /* Analog mode select */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
return s->amsel;
+ case 0xfd0 ... 0xfff: /* ID registers */
+ return s->id[(offset - 0xfd0) >> 2];
default:
+ bad_offset:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "pl061_read: Bad offset %x\n", (int)offset);
break;
}
-err_out:
- qemu_log_mask(LOG_GUEST_ERROR,
- "pl061_read: Bad offset %x\n", (int)offset);
return 0;
}
@@ -214,16 +241,12 @@ static void pl061_write(void *opaque, hwaddr offset,
PL061State *s = (PL061State *)opaque;
uint8_t mask;
- if (offset < 0x400) {
+ switch (offset) {
+ case 0 ... 0x3ff:
mask = (offset >> 2) & s->dir;
s->data = (s->data & ~mask) | (value & mask);
pl061_update(s);
return;
- }
- if (offset >= s->rsvd_start) {
- goto err_out;
- }
- switch (offset) {
case 0x400: /* Direction */
s->dir = value & 0xff;
break;
@@ -247,47 +270,80 @@ static void pl061_write(void *opaque, hwaddr offset,
s->afsel = (s->afsel & ~mask) | (value & mask);
break;
case 0x500: /* 2mA drive */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->dr2r = value & 0xff;
break;
case 0x504: /* 4mA drive */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->dr4r = value & 0xff;
break;
case 0x508: /* 8mA drive */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->dr8r = value & 0xff;
break;
case 0x50c: /* Open drain */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->odr = value & 0xff;
break;
case 0x510: /* Pull-up */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->pur = value & 0xff;
break;
case 0x514: /* Pull-down */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->pdr = value & 0xff;
break;
case 0x518: /* Slew rate control */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->slr = value & 0xff;
break;
case 0x51c: /* Digital enable */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->den = value & 0xff;
break;
case 0x520: /* Lock */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->locked = (value != 0xacce551);
break;
case 0x524: /* Commit */
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
if (!s->locked)
s->cr = value & 0xff;
break;
case 0x528:
+ if (s->id != pl061_id_luminary) {
+ goto bad_offset;
+ }
s->amsel = value & 0xff;
break;
default:
- goto err_out;
+ bad_offset:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "pl061_write: Bad offset %x\n", (int)offset);
+ return;
}
pl061_update(s);
return;
-err_out:
- qemu_log_mask(LOG_GUEST_ERROR,
- "pl061_write: Bad offset %x\n", (int)offset);
}
static void pl061_reset(DeviceState *dev)
@@ -343,7 +399,6 @@ static void pl061_luminary_init(Object *obj)
PL061State *s = PL061(obj);
s->id = pl061_id_luminary;
- s->rsvd_start = 0x52c;
}
static void pl061_init(Object *obj)
@@ -353,7 +408,6 @@ static void pl061_init(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
s->id = pl061_id;
- s->rsvd_start = 0x424;
memory_region_init_io(&s->iomem, obj, &pl061_ops, s, "pl061", 0x1000);
sysbus_init_mmio(sbd, &s->iomem);
--
2.20.1
next prev parent reply other threads:[~2021-07-09 16:16 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 16:09 [PULL 00/17] target-arm queue Peter Maydell
2021-07-09 16:09 ` [PULL 01/17] stm32f100: Add the stm32f100 SoC Peter Maydell
2021-07-09 16:09 ` [PULL 02/17] stm32vldiscovery: Add the STM32VLDISCOVERY Machine Peter Maydell
2021-07-09 16:09 ` [PULL 03/17] docs/system: arm: Add stm32 boards description Peter Maydell
2021-07-09 16:09 ` [PULL 04/17] tests/boot-serial-test: Add STM32VLDISCOVERY board testcase Peter Maydell
2021-07-09 16:09 ` [PULL 05/17] hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write Peter Maydell
2021-07-09 16:09 ` [PULL 06/17] hw/gpio/pl061: Convert DPRINTF to tracepoints Peter Maydell
2021-07-09 16:09 ` Peter Maydell [this message]
2021-07-09 16:09 ` [PULL 08/17] hw/gpio/pl061: Add tracepoints for register read and write Peter Maydell
2021-07-09 16:09 ` [PULL 09/17] hw/gpio/pl061: Document the interface of this device Peter Maydell
2021-07-09 16:09 ` [PULL 10/17] hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers Peter Maydell
2021-07-09 16:09 ` [PULL 11/17] hw/gpio/pl061: Make pullup/pulldown of outputs configurable Peter Maydell
2021-07-09 16:09 ` [PULL 12/17] hw/arm/virt: Make PL061 GPIO lines pulled low, not high Peter Maydell
2021-07-09 16:09 ` [PULL 13/17] hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on reset Peter Maydell
2021-07-09 16:10 ` [PULL 14/17] hw/gpio/pl061: Document a shortcoming in our implementation Peter Maydell
2021-07-09 16:10 ` [PULL 15/17] hw/arm/stellaris: Expand comment about handling of OLED chipselect Peter Maydell
2021-07-09 16:10 ` [PULL 16/17] target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint Peter Maydell
2021-07-09 16:10 ` [PULL 17/17] hw/intc: Improve formatting of MEMTX_ERROR guest error message Peter Maydell
2021-07-11 13:31 ` [PULL 00/17] target-arm queue Peter Maydell
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