From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: qemu-trivial@nongnu.org, "Michael Tokarev" <mjt@tls.msk.ru>,
"Laurent Vivier" <laurent@vivier.eu>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 2/9] memory: Display MemoryRegion name in read/write ops trace events
Date: Fri, 9 Jul 2021 22:28:17 +0200 [thread overview]
Message-ID: <20210709202824.578187-3-laurent@vivier.eu> (raw)
In-Reply-To: <20210709202824.578187-1-laurent@vivier.eu>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
MemoryRegion names is cached on first call to memory_region_name(),
so displaying the name is trace events is cheap. Add it for read /
write ops.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20210307074833.143106-1-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
softmmu/memory.c | 12 ++++++++----
softmmu/trace-events | 4 ++--
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/softmmu/memory.c b/softmmu/memory.c
index f0161515e96d..24a97c8b1f9a 100644
--- a/softmmu/memory.c
+++ b/softmmu/memory.c
@@ -442,7 +442,8 @@ static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
} else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
- trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
+ trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
+ memory_region_name(mr));
}
memory_region_shift_read_access(value, shift, mask, tmp);
return MEMTX_OK;
@@ -464,7 +465,8 @@ static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
} else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
- trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
+ trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
+ memory_region_name(mr));
}
memory_region_shift_read_access(value, shift, mask, tmp);
return r;
@@ -484,7 +486,8 @@ static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
} else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
- trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
+ trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
+ memory_region_name(mr));
}
mr->ops->write(mr->opaque, addr, tmp, size);
return MEMTX_OK;
@@ -504,7 +507,8 @@ static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
} else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
- trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
+ trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
+ memory_region_name(mr));
}
return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
}
diff --git a/softmmu/trace-events b/softmmu/trace-events
index d18ac41e4e34..7b278590a0e2 100644
--- a/softmmu/trace-events
+++ b/softmmu/trace-events
@@ -9,8 +9,8 @@ cpu_in(unsigned int addr, char size, unsigned int val) "addr 0x%x(%c) value %u"
cpu_out(unsigned int addr, char size, unsigned int val) "addr 0x%x(%c) value %u"
# memory.c
-memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u"
-memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u"
+memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u name '%s'"
+memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u name '%s'"
memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64" size %u"
memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64" size %u"
memory_region_ram_device_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u"
--
2.31.1
next prev parent reply other threads:[~2021-07-09 20:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 20:28 [PULL 0/9] Trivial branch for 6.1 patches Laurent Vivier
2021-07-09 20:28 ` [PULL 1/9] qemu-option: Drop dead assertion Laurent Vivier
2021-07-09 20:28 ` Laurent Vivier [this message]
2021-07-09 20:28 ` [PULL 3/9] misc: Fix "havn't" typo Laurent Vivier
2021-07-09 20:28 ` [PULL 4/9] virtiofsd: Add missing newline in error message Laurent Vivier
2021-07-09 20:28 ` [PULL 5/9] misc: Remove redundant new line in perror() Laurent Vivier
2021-07-09 20:28 ` [PULL 6/9] hw/virtio: Document *_should_notify() are called within rcu_read_lock() Laurent Vivier
2021-07-09 20:28 ` [PULL 7/9] target/xtensa/xtensa-semi: Fix compilation problem on Haiku Laurent Vivier
2021-07-09 20:28 ` [PULL 8/9] migration: fix typo in mig_throttle_guest_down comment Laurent Vivier
2021-07-09 20:28 ` [PULL 9/9] util/guest-random: Fix size arg to tail memcpy Laurent Vivier
2021-07-11 21:20 ` [PULL 0/9] Trivial branch for 6.1 patches Peter Maydell
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