From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH 40/41] tcg: Remove TCG_TARGET_HAS_goto_ptr
Date: Sat, 10 Jul 2021 08:31:42 -0700 [thread overview]
Message-ID: <20210710153143.1320521-41-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210710153143.1320521-1-richard.henderson@linaro.org>
Since 6eea04347eb6, all tcg backends support goto_ptr.
Remove the conditional, making support mandatory.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg-opc.h | 3 +--
tcg/aarch64/tcg-target.h | 1 -
tcg/arm/tcg-target.h | 1 -
tcg/i386/tcg-target.h | 1 -
tcg/mips/tcg-target.h | 1 -
tcg/ppc/tcg-target.h | 1 -
tcg/riscv/tcg-target.h | 1 -
tcg/s390/tcg-target.h | 1 -
tcg/sparc/tcg-target.h | 1 -
tcg/tci/tcg-target.h | 1 -
tcg/tcg-op.c | 2 +-
tcg/tcg.c | 8 ++------
12 files changed, 4 insertions(+), 18 deletions(-)
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h
index 993992373e..675873e200 100644
--- a/include/tcg/tcg-opc.h
+++ b/include/tcg/tcg-opc.h
@@ -194,8 +194,7 @@ DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_WORDS,
TCG_OPF_NOT_PRESENT)
DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END)
DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END)
-DEF(goto_ptr, 0, 1, 0,
- TCG_OPF_BB_EXIT | TCG_OPF_BB_END | IMPL(TCG_TARGET_HAS_goto_ptr))
+DEF(goto_ptr, 0, 1, 0, TCG_OPF_BB_EXIT | TCG_OPF_BB_END)
DEF(plugin_cb_start, 0, 0, 3, TCG_OPF_NOT_PRESENT)
DEF(plugin_cb_end, 0, 0, 0, TCG_OPF_NOT_PRESENT)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 551baf8da3..7a93ac8023 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -88,7 +88,6 @@ typedef enum {
#define TCG_TARGET_HAS_mulsh_i32 0
#define TCG_TARGET_HAS_extrl_i64_i32 0
#define TCG_TARGET_HAS_extrh_i64_i32 0
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_qemu_st8_i32 0
#define TCG_TARGET_HAS_div_i64 1
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 95fcef33bc..d113b7f8db 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -148,7 +148,6 @@ extern bool use_neon_instructions;
#define TCG_TARGET_HAS_mulsh_i32 0
#define TCG_TARGET_HAS_div_i32 use_idiv_instructions
#define TCG_TARGET_HAS_rem_i32 0
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_direct_jump 0
#define TCG_TARGET_HAS_qemu_st8_i32 0
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index ac10066c3e..b00a6da293 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -135,7 +135,6 @@ extern bool have_movbe;
#define TCG_TARGET_HAS_muls2_i32 1
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_direct_jump 1
#if TCG_TARGET_REG_BITS == 64
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index e81e824cab..3a62055f04 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -136,7 +136,6 @@ extern bool use_mips32r2_instructions;
#define TCG_TARGET_HAS_muluh_i32 1
#define TCG_TARGET_HAS_mulsh_i32 1
#define TCG_TARGET_HAS_bswap32_i32 1
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_direct_jump 1
#if TCG_TARGET_REG_BITS == 64
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index c13ed5640a..0943192cde 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -108,7 +108,6 @@ extern bool have_vsx;
#define TCG_TARGET_HAS_muls2_i32 0
#define TCG_TARGET_HAS_muluh_i32 1
#define TCG_TARGET_HAS_mulsh_i32 1
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_direct_jump 1
#define TCG_TARGET_HAS_qemu_st8_i32 0
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
index 87ea94666b..ef78b99e98 100644
--- a/tcg/riscv/tcg-target.h
+++ b/tcg/riscv/tcg-target.h
@@ -85,7 +85,6 @@ typedef enum {
#define TCG_TARGET_CALL_STACK_OFFSET 0
/* optional instructions */
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_movcond_i32 0
#define TCG_TARGET_HAS_div_i32 1
#define TCG_TARGET_HAS_rem_i32 1
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index b04b72b7eb..2e4ede2ea2 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -98,7 +98,6 @@ extern uint64_t s390_facilities;
#define TCG_TARGET_HAS_mulsh_i32 0
#define TCG_TARGET_HAS_extrl_i64_i32 0
#define TCG_TARGET_HAS_extrh_i64_i32 0
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_direct_jump (s390_facilities & FACILITY_GEN_INST_EXT)
#define TCG_TARGET_HAS_qemu_st8_i32 0
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 86bb9a2d39..c050763049 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -121,7 +121,6 @@ extern bool use_vis3_instructions;
#define TCG_TARGET_HAS_muls2_i32 1
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_direct_jump 1
#define TCG_TARGET_HAS_qemu_st8_i32 0
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index 7b6089f304..033e613f24 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -87,7 +87,6 @@
#define TCG_TARGET_HAS_muls2_i32 1
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
-#define TCG_TARGET_HAS_goto_ptr 1
#define TCG_TARGET_HAS_direct_jump 0
#define TCG_TARGET_HAS_qemu_st8_i32 0
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 44d711c0fc..3d5db9a33c 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -2754,7 +2754,7 @@ void tcg_gen_goto_tb(unsigned idx)
void tcg_gen_lookup_and_goto_ptr(void)
{
- if (TCG_TARGET_HAS_goto_ptr && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
+ if (!qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
TCGv_ptr ptr;
plugin_gen_disable_mem_helpers();
diff --git a/tcg/tcg.c b/tcg/tcg.c
index ed86a70b79..4142d42d77 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -789,9 +789,7 @@ void tcg_prologue_init(TCGContext *s)
* For tci, we use NULL as the signal to return from the interpreter,
* so skip this check.
*/
- if (TCG_TARGET_HAS_goto_ptr) {
- tcg_debug_assert(tcg_code_gen_epilogue != NULL);
- }
+ tcg_debug_assert(tcg_code_gen_epilogue != NULL);
#endif
tcg_region_prologue_set(s);
@@ -1176,6 +1174,7 @@ bool tcg_op_supported(TCGOpcode op)
case INDEX_op_insn_start:
case INDEX_op_exit_tb:
case INDEX_op_goto_tb:
+ case INDEX_op_goto_ptr:
case INDEX_op_qemu_ld_i32:
case INDEX_op_qemu_st_i32:
case INDEX_op_qemu_ld_i64:
@@ -1185,9 +1184,6 @@ bool tcg_op_supported(TCGOpcode op)
case INDEX_op_qemu_st8_i32:
return TCG_TARGET_HAS_qemu_st8_i32;
- case INDEX_op_goto_ptr:
- return TCG_TARGET_HAS_goto_ptr;
-
case INDEX_op_mov_i32:
case INDEX_op_setcond_i32:
case INDEX_op_brcond_i32:
--
2.25.1
next prev parent reply other threads:[~2021-07-10 15:52 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-10 15:31 [PATCH 00/41] tcg patch queue Richard Henderson
2021-07-10 15:31 ` [PATCH 01/41] tcg: Add separator in INDEX_op_call dump Richard Henderson
2021-07-10 15:31 ` [PATCH 02/41] tcg: Avoid including 'trace-tcg.h' in target translate.c Richard Henderson
2021-07-10 15:31 ` [PATCH 03/41] accel/tcg: Hoist tcg_tb_insert() up above tb_link_page() Richard Henderson
2021-07-10 15:31 ` [PATCH 04/41] tcg: Bake tb_destroy() into tcg_region_tree Richard Henderson
2021-07-10 15:31 ` [PATCH 05/41] tcg: Move tb_phys_invalidate_count to tb_ctx Richard Henderson
2021-07-10 15:31 ` [PATCH 06/41] accel/tcg: Introduce translator_use_goto_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 07/41] target/alpha: Remove use_exit_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 08/41] target/alpha: Remove in_superpage Richard Henderson
2021-07-10 15:31 ` [PATCH 09/41] target/alpha: Use translator_use_goto_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 10/41] target/arm: Use DISAS_TOO_MANY for ISB and SB Richard Henderson
2021-07-10 15:31 ` [PATCH 11/41] target/arm: Use translator_use_goto_tb for aarch64 Richard Henderson
2021-07-10 15:31 ` [PATCH 12/41] target/arm: Use translator_use_goto_tb for aarch32 Richard Henderson
2021-07-10 15:31 ` [PATCH 13/41] target/avr: Use translator_use_goto_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 14/41] target/avr: Mark some helpers noreturn Richard Henderson
2021-07-10 15:31 ` [PATCH 15/41] target/cris: Use translator_use_goto_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 16/41] target/hppa: " Richard Henderson
2021-07-10 15:31 ` [PATCH 17/41] target/i386: " Richard Henderson
2021-07-10 15:31 ` [PATCH 18/41] target/m68k: " Richard Henderson
2021-07-10 15:31 ` [PATCH 19/41] target/microblaze: " Richard Henderson
2021-07-10 15:31 ` [PATCH 20/41] target/mips: " Richard Henderson
2021-07-10 15:31 ` [PATCH 21/41] target/mips: Fix missing else in gen_goto_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 22/41] target/nios2: Use translator_use_goto_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 23/41] target/openrisc: " Richard Henderson
2021-07-10 15:31 ` [PATCH 24/41] target/ppc: " Richard Henderson
2021-07-10 15:31 ` [PATCH 25/41] target/riscv: " Richard Henderson
2021-07-10 15:31 ` [PATCH 26/41] target/rx: " Richard Henderson
2021-07-10 15:31 ` [PATCH 27/41] target/s390x: " Richard Henderson
2021-07-10 15:31 ` [PATCH 28/41] target/s390x: Remove use_exit_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 29/41] target/sh4: Use translator_use_goto_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 30/41] target/sparc: " Richard Henderson
2021-07-10 15:31 ` [PATCH 31/41] target/tricore: " Richard Henderson
2021-07-10 15:31 ` [PATCH 32/41] target/tricore: Use tcg_gen_lookup_and_goto_ptr Richard Henderson
2021-07-10 15:31 ` [PATCH 33/41] target/xtensa: Use translator_use_goto_tb Richard Henderson
2021-07-10 15:31 ` [PATCH 34/41] tcg: Fix prologue disassembly Richard Henderson
2021-07-10 15:31 ` [PATCH 35/41] target/i386: Use cpu_breakpoint_test in breakpoint_handler Richard Henderson
2021-07-10 15:31 ` [PATCH 36/41] accel/tcg: Move helper_lookup_tb_ptr to cpu-exec.c Richard Henderson
2021-07-10 15:31 ` [PATCH 37/41] accel/tcg: Move tb_lookup " Richard Henderson
2021-07-10 15:31 ` [PATCH 38/41] accel/tcg: Split out log_cpu_exec Richard Henderson
2021-07-10 15:31 ` [PATCH 39/41] accel/tcg: Log tb->cflags with -d exec Richard Henderson
2021-07-10 15:31 ` Richard Henderson [this message]
2021-07-10 15:31 ` [PATCH 41/41] cpu: Add breakpoint tracepoints Richard Henderson
2021-07-10 16:24 ` [PATCH 00/41] tcg patch queue Peter Maydell
2021-07-11 0:12 ` Richard Henderson
2021-07-12 11:53 ` Peter Maydell
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