From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Dmitry Voronetskiy <davoronetskiy@gmail.com>
Subject: [PULL 01/14] target/i386: Tidy hw_breakpoint_remove
Date: Tue, 13 Jul 2021 09:41:58 -0700 [thread overview]
Message-ID: <20210713164211.1520109-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210713164211.1520109-1-richard.henderson@linaro.org>
From: Dmitry Voronetskiy <davoronetskiy@gmail.com>
Since cpu_breakpoint and cpu_watchpoint are in a union,
the code should access only one of them.
Signed-off-by: Dmitry Voronetskiy <davoronetskiy@gmail.com>
Message-Id: <20210613180838.21349-1-davoronetskiy@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/i386/tcg/sysemu/bpt_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/tcg/sysemu/bpt_helper.c b/target/i386/tcg/sysemu/bpt_helper.c
index 624f90b789..4d96a48a3c 100644
--- a/target/i386/tcg/sysemu/bpt_helper.c
+++ b/target/i386/tcg/sysemu/bpt_helper.c
@@ -109,9 +109,9 @@ static void hw_breakpoint_remove(CPUX86State *env, int index)
case DR7_TYPE_DATA_WR:
case DR7_TYPE_DATA_RW:
- if (env->cpu_breakpoint[index]) {
+ if (env->cpu_watchpoint[index]) {
cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[index]);
- env->cpu_breakpoint[index] = NULL;
+ env->cpu_watchpoint[index] = NULL;
}
break;
--
2.25.1
next prev parent reply other threads:[~2021-07-13 16:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-13 16:41 [PULL 00/14] misc translator patch queue Richard Henderson
2021-07-13 16:41 ` Richard Henderson [this message]
2021-07-13 16:41 ` [PULL 02/14] target/i386: Trivial code motion and code style fix Richard Henderson
2021-07-13 16:42 ` [PULL 03/14] target/i386: Split out do_fninit Richard Henderson
2021-07-13 16:42 ` [PULL 04/14] target/i386: Correct implementation for FCS, FIP, FDS and FDP Richard Henderson
2021-07-13 16:42 ` [PULL 05/14] target/alpha: Store set into rx flag Richard Henderson
2021-07-13 16:42 ` [PULL 06/14] target/alpha: Use dest_sink for HW_RET temporary Richard Henderson
2021-07-13 16:42 ` [PULL 07/14] target/alpha: Use tcg_constant_i64 for zero and lit Richard Henderson
2021-07-13 16:42 ` [PULL 08/14] target/alpha: Use tcg_constant_* elsewhere Richard Henderson
2021-07-13 16:42 ` [PULL 09/14] target/openrisc: Use tcg_constant_* Richard Henderson
2021-07-13 16:42 ` [PULL 10/14] target/openrisc: Use tcg_constant_tl for dc->R0 Richard Henderson
2021-07-13 16:42 ` [PULL 11/14] target/openrisc: Cache constant 0 in DisasContext Richard Henderson
2021-07-13 16:42 ` [PULL 12/14] target/openrisc: Use dc->zero in gen_add, gen_addc Richard Henderson
2021-07-13 16:42 ` [PULL 13/14] target/hppa: Use tcg_constant_* Richard Henderson
2021-07-13 16:42 ` [PULL 14/14] target/hppa: Clean up DisasCond Richard Henderson
2021-07-14 15:24 ` [PULL 00/14] misc translator patch queue Peter Maydell
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