From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Eduardo Habkost <ehabkost@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Julia Suvorova <jusual@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
David Gibson <david@gibson.dropbear.id.au>
Subject: [PULL v3 03/19] hw/pci/pcie: Do not set HPC flag if acpihp is used
Date: Fri, 16 Jul 2021 11:15:08 -0400 [thread overview]
Message-ID: <20210716151416.155127-4-mst@redhat.com> (raw)
In-Reply-To: <20210716151416.155127-1-mst@redhat.com>
From: Julia Suvorova <jusual@redhat.com>
Instead of changing the hot-plug type in _OSC register, do not
set the 'Hot-Plug Capable' flag. This way guest will choose ACPI
hot-plug if it is preferred and leave the option to use SHPC with
pcie-pci-bridge.
The ability to control hot-plug for each downstream port is retained,
while 'hotplug=off' on the port means all hot-plug types are disabled.
Signed-off-by: Julia Suvorova <jusual@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20210713004205.775386-4-jusual@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/pci/pcie_port.h | 5 ++++-
hw/acpi/pcihp.c | 8 ++++++++
hw/core/machine.c | 1 -
hw/i386/pc_q35.c | 11 +++++++++++
hw/pci/pcie.c | 8 +++++++-
hw/pci/pcie_port.c | 1 +
6 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index bea8ecad0f..e25b289ce8 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -57,8 +57,11 @@ struct PCIESlot {
/* Disable ACS (really for a pcie_root_port) */
bool disable_acs;
- /* Indicates whether hot-plug is enabled on the slot */
+ /* Indicates whether any type of hot-plug is allowed on the slot */
bool hotplug;
+
+ bool native_hotplug;
+
QLIST_ENTRY(PCIESlot) next;
};
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 9fdc6342b0..f4d706e47d 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -31,6 +31,7 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_host.h"
+#include "hw/pci/pcie_port.h"
#include "hw/i386/acpi-build.h"
#include "hw/acpi/acpi.h"
#include "hw/pci/pci_bus.h"
@@ -336,6 +337,13 @@ void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
+ /* Remove all hot-plug handlers if hot-plug is disabled on slot */
+ if (object_dynamic_cast(OBJECT(dev), TYPE_PCIE_SLOT) &&
+ !PCIE_SLOT(pdev)->hotplug) {
+ qbus_set_hotplug_handler(BUS(sec), NULL);
+ return;
+ }
+
qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev));
/* We don't have to overwrite any other hotplug handler yet */
assert(QLIST_EMPTY(&sec->child));
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 6f59fb0b7f..775add0795 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -584,7 +584,6 @@ static void machine_set_memdev(Object *obj, const char *value, Error **errp)
ms->ram_memdev_id = g_strdup(value);
}
-
static void machine_init_notify(Notifier *notifier, void *data)
{
MachineState *machine = MACHINE(qdev_get_machine());
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 46a0f196f4..04b4a4788d 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -37,6 +37,7 @@
#include "sysemu/kvm.h"
#include "hw/kvm/clock.h"
#include "hw/pci-host/q35.h"
+#include "hw/pci/pcie_port.h"
#include "hw/qdev-properties.h"
#include "hw/i386/x86.h"
#include "hw/i386/pc.h"
@@ -136,6 +137,7 @@ static void pc_q35_init(MachineState *machine)
ram_addr_t lowmem;
DriveInfo *hd[MAX_SATA_PORTS];
MachineClass *mc = MACHINE_GET_CLASS(machine);
+ bool acpi_pcihp;
/* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
* and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
@@ -236,6 +238,15 @@ static void pc_q35_init(MachineState *machine)
object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
OBJECT(lpc), &error_abort);
+ acpi_pcihp = object_property_get_bool(OBJECT(lpc),
+ "acpi-pci-hotplug-with-bridge-support",
+ NULL);
+
+ if (acpi_pcihp) {
+ object_register_sugar_prop(TYPE_PCIE_SLOT, "native-hotplug",
+ "false", true);
+ }
+
/* irq lines */
gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index fd0fa157e8..6e95d82903 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -529,7 +529,13 @@ void pcie_cap_slot_init(PCIDevice *dev, PCIESlot *s)
PCI_EXP_SLTCAP_PIP |
PCI_EXP_SLTCAP_AIP |
PCI_EXP_SLTCAP_ABP);
- if (s->hotplug) {
+
+ /*
+ * Enable native hot-plug on all hot-plugged bridges unless
+ * hot-plug is disabled on the slot.
+ */
+ if (s->hotplug &&
+ (s->native_hotplug || DEVICE(dev)->hotplugged)) {
pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP,
PCI_EXP_SLTCAP_HPS |
PCI_EXP_SLTCAP_HPC);
diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c
index eb563ad435..da850e8dde 100644
--- a/hw/pci/pcie_port.c
+++ b/hw/pci/pcie_port.c
@@ -148,6 +148,7 @@ static Property pcie_slot_props[] = {
DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true),
+ DEFINE_PROP_BOOL("native-hotplug", PCIESlot, native_hotplug, true),
DEFINE_PROP_END_OF_LIST()
};
--
MST
next prev parent reply other threads:[~2021-07-16 15:17 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-16 15:15 [PULL v3 00/19] pc,pci,virtio: lots of new features Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 01/19] hw/i386/acpi-build: Add ACPI PCI hot-plug methods to Q35 Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 02/19] hw/acpi/ich9: Enable ACPI PCI hot-plug Michael S. Tsirkin
2021-07-16 15:15 ` Michael S. Tsirkin [this message]
2021-07-16 15:15 ` [PULL v3 04/19] bios-tables-test: Allow changes in DSDT ACPI tables Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 05/19] hw/acpi/ich9: Set ACPI PCI hot-plug as default on Q35 Michael S. Tsirkin
2021-07-20 11:38 ` Laurent Vivier
2021-07-20 12:56 ` Laurent Vivier
2021-07-21 14:59 ` Igor Mammedov
2021-07-21 15:49 ` Laurent Vivier
2021-07-21 16:09 ` Michael S. Tsirkin
2021-07-21 16:27 ` Igor Mammedov
2021-07-21 16:37 ` Michael S. Tsirkin
2021-07-22 9:56 ` Laurent Vivier
2021-07-22 10:57 ` Igor Mammedov
2021-07-21 16:01 ` Philippe Mathieu-Daudé
2021-07-16 15:15 ` [PULL v3 06/19] bios-tables-test: Update golden binaries Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 07/19] hw/virtio: add boilerplate for vhost-user-i2c device Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 08/19] hw/virtio: add vhost-user-i2c-pci boilerplate Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 09/19] docs: Add '-device intel-iommu' entry Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 10/19] hw/pci/pci_host: Allow PCI host to bypass iommu Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 11/19] hw/pxb: Add a bypass iommu property Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 12/19] hw/arm/virt: Add default_bus_bypass_iommu machine option Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 13/19] hw/i386: Add a default_bus_bypass_iommu pc " Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 14/19] hw/pci: Add pci_bus_range() to get PCI bus number range Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 15/19] hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3 Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 16/19] hw/i386/acpi-build: Add DMAR support to bypass iommu Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 17/19] hw/i386/acpi-build: Add IVRS " Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 18/19] docs: Add documentation for iommu bypass Michael S. Tsirkin
2021-07-16 15:15 ` [PULL v3 19/19] vhost-vsock: SOCK_SEQPACKET feature bit support Michael S. Tsirkin
2021-07-16 17:49 ` [PULL v3 00/19] pc,pci,virtio: lots of new features Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210716151416.155127-4-mst@redhat.com \
--to=mst@redhat.com \
--cc=david@gibson.dropbear.id.au \
--cc=ehabkost@redhat.com \
--cc=imammedo@redhat.com \
--cc=jusual@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).