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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk,
	alex.bennee@linaro.org, f4bug@amsat.org
Subject: [PATCH for-6.1 v4 01/15] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS
Date: Mon, 19 Jul 2021 11:22:25 -1000	[thread overview]
Message-ID: <20210719212239.428740-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org>

The space reserved for CF_COUNT_MASK was overly large.
Reduce to free up cflags bits and eliminate an extra test.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210717221851.2124573-2-richard.henderson@linaro.org>
---
 include/exec/exec-all.h   | 4 +++-
 accel/tcg/translate-all.c | 5 ++---
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 754f4130c9..dfe82ed19c 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -492,7 +492,9 @@ struct TranslationBlock {
     target_ulong cs_base; /* CS base for this block */
     uint32_t flags; /* flags defining in which context the code was generated */
     uint32_t cflags;    /* compile flags */
-#define CF_COUNT_MASK  0x00007fff
+
+/* Note that TCG_MAX_INSNS is 512; we validate this match elsewhere. */
+#define CF_COUNT_MASK  0x000001ff
 #define CF_LAST_IO     0x00008000 /* Last insn may be an IO access.  */
 #define CF_MEMI_ONLY   0x00010000 /* Only instrument memory ops */
 #define CF_USE_ICOUNT  0x00020000
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 4df26de858..5cc01d693b 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1428,11 +1428,10 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
 
     max_insns = cflags & CF_COUNT_MASK;
     if (max_insns == 0) {
-        max_insns = CF_COUNT_MASK;
-    }
-    if (max_insns > TCG_MAX_INSNS) {
         max_insns = TCG_MAX_INSNS;
     }
+    QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 != TCG_MAX_INSNS);
+
     if (cpu->singlestep_enabled || singlestep) {
         max_insns = 1;
     }
-- 
2.25.1



  reply	other threads:[~2021-07-19 21:25 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-19 21:22 [PATCH for-6.1 v4 00/15] tcg: breakpoint reorg Richard Henderson
2021-07-19 21:22 ` Richard Henderson [this message]
2021-07-19 21:22 ` [PATCH for-6.1 v4 02/15] accel/tcg: Move curr_cflags into cpu-exec.c Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 03/15] target/alpha: Drop goto_tb path in gen_call_pal Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 04/15] accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 05/15] accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 06/15] accel/tcg: Handle -singlestep in curr_cflags Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 07/15] accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 08/15] accel/tcg: Move cflags lookup into tb_find Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 09/15] hw/core: Introduce TCGCPUOps.debug_check_breakpoint Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 10/15] target/arm: Implement debug_check_breakpoint Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 11/15] target/i386: " Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 12/15] accel/tcg: Move breakpoint recognition outside translation Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 13/15] accel/tcg: Remove TranslatorOps.breakpoint_check Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 14/15] accel/tcg: Hoist tb_cflags to a local in translator_loop Richard Henderson
2021-07-19 21:22 ` [PATCH for-6.1 v4 15/15] accel/tcg: Record singlestep_enabled in tb->cflags Richard Henderson
2021-07-19 21:45   ` Richard Henderson

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