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[204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25378054pgi.94.2021.07.19.18.18.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 18:18:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v5 00/15] tcg: breakpoint reorg Date: Mon, 19 Jul 2021 15:17:45 -1000 Message-Id: <20210720011800.483966-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is fixing #404 ("windows xp boot takes much longer...") and several other similar reports. Changes for v5: * Include missing hunk in tb_gen_code, as noted in reply to v4. * Remove helper_check_breakpoints from target/arm/. * Reorg cflags_for_breakpoints into check_for_breakpoints; reorg cpu_exec to use a break instead of a longjmp. * Move singlestep_enabled check from cflags_for_breakpoints to curr_cflags, which makes cpu_exec_step_atomic cleaner. Changes for v4: * Issue breakpoints directly from cflags_for_breakpoints. Do not generate code for a TB beginning with a BP at all. * Drop the problematic TranslatorOps.breakpoint_check hook entirely. Changes for v3: * Map CF_COUNT_MASK == 0 -> TCG_MAX_INSNS. * Split out *_breakpoint_check fixes for avr, mips, riscv. Changes for v2: * All prerequisites and 7 of the patches from v1 with are merged. Patches lacking review are all new: 03-target-alpha-Drop-goto_tb-path-in-gen_call_pal.patch 08-hw-core-Introduce-TCGCPUOps.debug_check_breakpoin.patch 09-target-arm-Implement-debug_check_breakpoint.patch 10-target-i386-Implement-debug_check_breakpoint.patch 11-accel-tcg-Merge-tb_find-into-its-only-caller.patch 12-accel-tcg-Move-breakpoint-recognition-outside-tra.patch 13-accel-tcg-Remove-TranslatorOps.breakpoint_check.patch 15-accel-tcg-Record-singlestep_enabled-in-tb-cflags.patch r~ Richard Henderson (15): accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS accel/tcg: Move curr_cflags into cpu-exec.c target/alpha: Drop goto_tb path in gen_call_pal accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain accel/tcg: Handle -singlestep in curr_cflags accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic hw/core: Introduce TCGCPUOps.debug_check_breakpoint target/arm: Implement debug_check_breakpoint target/i386: Implement debug_check_breakpoint accel/tcg: Merge tb_find into its only caller accel/tcg: Move breakpoint recognition outside translation accel/tcg: Remove TranslatorOps.breakpoint_check accel/tcg: Hoist tb_cflags to a local in translator_loop accel/tcg: Record singlestep_enabled in tb->cflags include/exec/exec-all.h | 24 +++-- include/exec/translator.h | 11 -- include/hw/core/tcg-cpu-ops.h | 6 ++ target/arm/helper.h | 2 - target/arm/internals.h | 3 + accel/tcg/cpu-exec.c | 192 +++++++++++++++++++++++++--------- accel/tcg/translate-all.c | 7 +- accel/tcg/translator.c | 39 ++----- cpu.c | 24 ----- target/alpha/translate.c | 31 +----- target/arm/cpu.c | 1 + target/arm/cpu_tcg.c | 1 + target/arm/debug_helper.c | 12 +-- target/arm/translate-a64.c | 25 ----- target/arm/translate.c | 29 ----- target/avr/translate.c | 10 -- target/cris/translate.c | 20 ---- target/hexagon/translate.c | 17 --- target/hppa/translate.c | 11 -- target/i386/tcg/tcg-cpu.c | 12 +++ target/i386/tcg/translate.c | 28 ----- target/m68k/translate.c | 18 ---- target/microblaze/translate.c | 18 ---- target/mips/tcg/translate.c | 19 ---- target/nios2/translate.c | 27 ----- target/openrisc/translate.c | 17 --- target/ppc/translate.c | 18 ---- target/riscv/translate.c | 17 --- target/rx/translate.c | 14 --- target/s390x/tcg/translate.c | 24 ----- target/sh4/translate.c | 18 ---- target/sparc/translate.c | 17 --- target/tricore/translate.c | 16 --- target/xtensa/translate.c | 17 --- tcg/tcg-op.c | 28 +++-- 35 files changed, 206 insertions(+), 567 deletions(-) -- 2.25.1